SU1444714A1 - Multichannel parameter monitoring device - Google Patents

Abstract

The invention relates to automation and computing, in particular, to devices for monitoring parameters of the amplitude-frequency signals of sensors, and can be used in automated control systems for various technological processes. The aim of the invention is to increase the completeness of control. The device contains a block of 1 parameter sensors, a switch 2, a distributor of 3 pulses, a block 4 of control and signaling, a block 5 of operational memory and an analyzer 6. In the device, in addition to analyzing the signals of the sensors in amplitude and frequency, An analysis of the duty cycle of a sequence of rectangular pulses generated from an input sinusoidal sensor signal, 8 sludge, is conducted. WITH

Description

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with

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The invention relates to automation and computing, in particular, to devices for monitoring parameters of the amplitude-frequency signals of sensors, and can be used in controlling and signaling ACS of various technological processes.

The purpose of the invention is to increase the total note of the control.

Figure 1 presents the scheme of the device; Fig. 2 shows a distribution scheme and mycoles; FIG. 3 is a block diagram of a RAM; 4 is a diagram of a control and signaling unit; figure 5 - diagram of the analyzer; figure 6 - time diagrams of the operation of the device when connecting sensors, the output signal of which is normal and has a deviation in frequency; Fig. 7 shows time diagrams of the device operation when sensors are connected with an amplitude below the threshold value, with a frequency below the working frequency range of the masked sensor; Fig. 8 shows time diagrams of the device operation when sensors are connected, the output signals of which are shifted up and down due to malfunction of the switch channels.

Fig. 1 shows a block 1 of parameter sensors, a commutator 2, a pulse distributor 3, a control and alarm unit 4, a random access memory block 5, an analyzer 6, element 7, an eleventh RS flip-flop 8.

Switch 2 is a multichannel analog signal switch. In order to reduce the error in the transmission of analog signals caused by leakage currents through closed channels, the combinator is built according to a four-step scheme. Also with a view. reducing the error due to pass resistances of public keys; their output is connected to a repeater made on the operational amplifier

with high input impedance.

The pulse distributor 3 (figure 2 contains a pulse generator 9, the first 10, the second 11, the third 12 elements OR, the element And 13, RS-trigger 14, the first 15 and the second 16 counters, the decoder 1 7,

The operative memory block 5 (FIG. 3) contains a 1-eporator pulse 18, s

first to third elements OR 19-21 first and second RS-flip-flops 22 and 23 JK-flip-flop 24, D-flip-flop 25, counter 26, decoder 27, one-shot 28, element 29, sample and hold node 30,

The control and signaling unit 4 (Fig. 4) contains a code converter 3 1, a decoder 32, a digital indicator 33, first and second keys of masking and demasking 34 and 35, a third key for setting automatic control with latching 36, fourth key of general reset 37 without fixation, from the fifth to the seventh keys 38-40 assignment of the search modes for anomalous and masked sensors, and anomalous channels, respectively, without fixing, from first to eleventh RS-trigger 41-51, from first to fourth elements of IL-52-55, element 2I-YLI 56, eleme1 T And 57, single-frequency 58 Torr, the first to third display elements 59-61.

Analyzer 6 (FIG. 5) contains discriminator 62 and detector zero 63, shaper kg-tupa 64, forming a short pulse at its output with a positive front of the input signal, from the first to the third pulse generator 65-67 with output frequencies sufficient to ensure the required accuracy in analyzing sensors with output C 1 Gyla of various frequencies, first and second counters 68 and 69, reversible counter 70 from first to third elements OR 71- 73, from first to seventh elements AND 74-80, first and second JK -triggers 81 and 82, from first to third RS-three gages 83-85, first to third elements are HE 86-88, AND-NOT element 89, first and second setpoint adjusters 90 and 91, code setpoint 92 and third for setpoint sensor 93, multiplexer 93, reference element 95, adder 96.

The device works as follows.

In the control and signaling unit 4, the key 36 is set to the depressed position, while from the third output of the control and signaling unit 4, the signal arrives at the first input of the pulse distributor 3 or 10, allowing the pulses from the pulse generator 9 to pass through the element 13 at the input of the counter 16 . Press the RESET key 37 briefly.

in block 4 of control and signaling, the signal from its fifth output goes to the first inputs of the elements OR 11 and 12, sets the trigger 14 through their outputs, counters 15 and 16 to their initial state, and through the second output of the pulse distributor 3 sets to the initial state of the flip-flops 81-85 and the counters 68-70 through the outputs of the elements OR 72 and 71 and the element NOT 87 in the analyzer 6, the leading edge of the pulse of the generator 9 of the pulses the trigger 14 is set to one, and the blocking is removed the installation input of the counter 16. Next is lsy a pulse generator 9 outputs applied to the inputs of the counter 16, the output of the decoder 17 formrfuets CE ri clock. From the second output of the decoder 17, the pulse is fed to the counting input of the counter 15, to the input of the OR element 19 of the RAM 5 and to the input of the OR element 72 of the analyzer. Fla output of counter 15 is set to the address of the first sensor, which is fed to the address inputs of switch 2, memory block 5, and control and signaling block 4.

When analyzing the signals of the sensors of unit 1, there may be the following situations:

the sensor is not masked, the signal is normal in amplitude (greater than the threshold value) and in frequency (in the working frequency range and not higher than the frequency limit in frequency) and has no component;

the sensor is not masked, the sensor signal is out of frequency setting limit, but is in the operating frequency range and has no constant component;

the sensor is not unmasked, the sensor signal is below the threshold value of. amplitude and does not have a constant component;

the sensor is not masked, the sensor signal is at a frequency below the operating frequency range and does not have a constant component;

sensor is masked;

the sensor is not masked, the sensor signal has a constant component.

Under the working frequency range there is a range in which

work -frequency sensor on this technological equipment under the condition of the health of the sensor. A faulty sensor may have a signal frequency below the operating range or (and) a low signal amplitude. In addition, the frequency setpoint determines the value of the sensor parameter (frequency), which characterizes the maximum permissible operating mode of the process equipment being serviced, i.e. the set value must be within the operating frequency range of the sensor.

Consider the operation of the device in each case separately.

The sensor signal of the block 1 parameter through the switch 2 enters the inputs of the discriminator 62 and the detector 63, since the signal amplitude is above the threshold value, and short pulses (FIG. 6) are generated at the output of pulse generator 64 when the input signal is equal to the threshold value with frequency equal to the frequency of the input signal. Next, the pulses from the output of the pulse generator 64 through the OR 71 are fed to the setup R input of the counter 68. At the output of the detector 63, a sequence of rectangular pulses of the same frequency with a bore equal to two, which are joint with the input levels, is formed from the input sinusoidal signal. After a time longer than two periods of the sensor signal, a pulse is generated at the lower boundary of the working frequency range at the K-m output of the decoder 17, which sets the trigger 84 into a single state. Since the sensor signal is normal and in amplitude and frequency, by the time the trigger 84 is set to one, the counter 68 does not have time to fill up to the set value specified by dial pad 91 (the counter 68 will be reset by pulses pulse generator output 64). Thus, the element AND 75 is open through two inputs and from the sequence of rectangular pulses arriving at the counting input of the trigger 81, an analysis time equal to one period of the input signal is formed at its direct output, during which the input 74 of the counter through element 74 impulse generator pulses come 5U

Sov. 66. During the analysis, it will not penetrate the filling of the counter 69 to the set value specified by dial type 90 and controlled by the matching circuit performed on the NAND element

89. At the forward output of the trigger 82, a signal is generated for the end of the analysis time and through the OR element 73 it goes to the second input of the pulse distributor 3 and through the output of the element

OR 12 sets the trigger 14 and the counter 16 to the initial state, i.e. prepares the pulse distributor 3 to form a certain tick,

In the case of connecting the sensor parameter bdoka 1 with the output signal,. exceeded the frequency setpoint (Fig. 6), in contrast to the case where the sensor parameter is normal, the counter 69 is filled to the value specified on the setpoint generator

90.At the same time, at the output of the element NAND

89 a signal is generated that prohibits further passage of pulses through element 74, in addition, this signal through element 86 does not arrive at the first input of the control and signaling unit 4, where it sets trigger 49 into one state, turns on display element 59, and also through the third the input of the element OR 73 prepares the pulse distributor 3 for the formation of the next cycle, not waiting for the end of the analysis time, i.e. end of period.

When a sensor with a signal below the threshold value in amplitude (Fig. 7) is connected at the output of the pulse shaper 64, there are no chucks that reset the counter 68, when the trigger 84 is set to one, the counter 68 is filled to the setpoint set value - by the setpoint parameter 91, and through the element And 78 the trigger 83 is set to one. Thus, at the output of the element 79, a signal is generated, which is fed to the third input of the control and signaling unit 4, where it sets the trigger 50 into the unit state and turns on the indication element 60. In addition, this signal through the second input of the element OR.73 prepares the pulse distributor 3 to form the next clock cycle.

146

The device operation when the sensor of block 1 is connected with a frequency below the working frequency range (Fig. 7) is similar to the case of connecting a sensor with a signal below the threshold value in amplitude, although at the output of the pulse former 64 pulses are generated, but by the time the trigger 84 is installed single state trigger 83 is also set to single state, since the frequency of the input signal is low (below the operating frequency range).

When a previously masked parameter sensor of block 1 is connected (Fig. 7), a logic unit signal appears at the output of RAM block 5, which sets trigger 8 to one state. After that, the pulse from the third output of the decoder 17 through the element AND 7 enters the input of the element OR .12 and sets the trigger 14 and the counter 16 to the initial state, through the third decoding decoder 1 7 the analyzer 6 and the trigger 8 are reset, and the distributor pulses 3 is preparing for the formation of the next cycle.

The time diagram of the device operation when connecting the sensor of the parameter of the unit 1, whose output signal due to the faulty: switch channel has a constant component, is shown in Fig. 8. It can be seen from the diagram that, at a positive value of the constant composition after the analysis time is formed equal to one period of the input signal, element 77 is opened and the reversible counter 70 adds up the counting pulses of the pulse generator 67, and during the positive period the reversible counter 70 goes into subtraction mode. Since the pulse duration of the positive half-cycle is longer than the pulse duration of the negative half-cycle, the counter 70 negatively overflows and the output signal of the loan of the last trigger 85 is set to one, the output of the number of pulses from the output of the adder 96, which is summed, is passed to the output of multiplexer 94 with inverse balance code. Next, the residual code is compared with the setpoint (the setpoint is set taking into account the frequency of the pulse generator 67 and based on the requirement for the formation of a fault signal for the anomalous channel, i.e. the offset value) and if the residual code is greater than the setpoint value, then And 80 the end of the analysis time (the setpoint at the direct output of the trigger 82 of the logical unit) appears a signal that goes to the input of the control and signaling unit 4, where it sets the 5G trigger to one state and turns on the indicator 61, as well as the end signal Lisa prepares the pulse distributor 3 to form the next clock pulse. With a negative constant at the output of the multiplexer, the direct residual code passes. Otherwise, the operation of the device is similar to the case of analyzing a signal with a positive constant component.

The operation of the operating memory unit 5 in the modes of reading and writing information and the control and signaling unit 4 in the modes of searching for addresses of abnormal and masked sensors and abnormal channels. The memory unit 5 operates in the mode of reading information at each arrival at the input of the element OR 19 clock pulse from the output of the pulse distributor 3, while the trigger 22 is set to one and the lock is removed from the setup inputs of the trigger 24 and counter 26 Under the control of the pulse generator 18 and the counter 26 at the output of the decoder 27 generates five sync pulses. The first clock pulse through the OR element 21 sets the trigger 24 to one state, the signal from its output goes to the CRYSTAL SELECTION of sample and storage node 30, the output of which sets information that is written to the trigger 25 by the third clock pulse from the decoder code 27. The fourth clock pulse trigger 24 returns to its original state trigger 24 operates in a counting mode and the CRYSTAL SELECT signal is removed. By the fifth clock pulse, the trigger 22 is set to the zero state, the trigger 24 and the counter 26 are blocked by the setup inputs, and the cycle of accessing the sample and storage node 30 ends

until the next clock pulse. The information is removed from the output of the trigger 25. The frequency of the pulse generator 18 is chosen such that by the time the signal arrives at the input of the element And 7 information was read.

In the recording mode, the information on the output of the one-shot 28 when entering masking or unmasking from the keys 34 or 35, respectively, generates a pulse that sets the trigger 23, and through the element OR 19 the trigger 22 into a single state. At the output of the decoder, as in the five synchro and mylk read mode, the second sync pulse through the And 29 element records the unit in the sample and storage node 30 when the signal arrives on the masking bus from the key 34 or zero when the signal arrives on the demasking bus 35 from the key 35. If the display elements 59-61 are turned on, this means that in the whole array there are block 1 parameter sensors with output signals below the permissible both in frequency and amplitude, as well as faulty channels in switch 2, for determining the address A button 36 is pressed out of abnormal sensors or faulty channels, and the signal from the output of trigger 43, which enters the input of the pulse distributor 3, through the OR 10 element blocks the flow of impulses of the pulse generator 9 to the input of the counter 16i. Then briefly presses the key 37, and on the digital indicators 33 it lights up the zero address and the flip-flops 49-51 us-, turn into the zero state and the display elements 59- 61 are turned off. Briefly, for example, the key 38 for searching for the addresses of abnormal sensors is pressed, the one-shot at the output 58 under the control of the signal from the output of the trigger 45 through the elements OR 52 and 53. Form1 - a pulse sets triggering 48 into a single state, the output signal of which is fed to the input of the element OR 10 of the pulse distributor 3 and allows the impulses of the generator 9 to pass through the element AND 13 to the counting input of the counter 16. There is an alternate connection of the sensors of the parameters of unit 1 via switch 2 to

9

analyzer 6 input. If at some address a sensor of block 1 is connected to the input of analyzer 6, the output signal of which is lower than the frequency or amplitude permissible, then the corresponding output of analyzer 6 will output a signal at the output of the element 79 or HE 86 which sets the trigger 49 or the trigger 50 in one state, depending on the type of deviation and on the location of the sensor block I (address) in the entire array, as well as through the OR 54 element, the 2I-LII 56 element and the OR 55 element are set to zero triggers trigger 45 and 48, thereby after stopping the addresses of the sensors of the block I, the address of the anomalous sensor of block 1 will be displayed on the 1C1FOROM indicator 33, and the display elements 59, 69 will indicate the type of deviation. Further, such a sensor of unit 1 is disconnected from the input of the device and by briefly pressing KPyucha 34 is excluded (masked) from the control. By briefly pressing key 38, the addresses of all abnormal sensors of block 1 are determined, and then they are excluded from monitoring by briefly pressing the key, 34 when the device is stopped on the anomalous sensor of block I, to remove the prohibition (unmasking) on the analysis of the previously masked sensor of block 1 by momentary pressing the key 39 determines the address of such a sensor, block 1 connects it to the input of the device and briefly pressing the key 35 unmasks it. The addresses of the anomalous channels are determined by briefly pressing the key 40 and if there are such channels, a signal V is formed at the output of the element 80 and sets the trigger 51 to the one state and turns on the display element 61, and through the element 57 and the element 55 is set to the zero state triggers 48 and 47, the address search is stopped, and on the digital indicator 33 the address of the sensor connected to the faulty channel of switch 2 is highlighted. After finding and correcting the problem in switch 2, pressing the key 36 The device starts up in automatic control mode.

Thus, the analysis is not only partial and amplitudes of the input 4471410

compared with the prototype, it is possible to increase the completeness of the control and, thus, increase the efficiency and reliability of the monitored technological object,

ten

Claims (1)

Invention Formula A multichannel parameter monitoring device comprising a unit 15 parameter sensors, a switch, a pulse distributor, a memory unit, a control and signaling unit and, an analyzer, the parameters sensor unit outputs are connected to the switchboard information inputs, a pulse distributor code inputs connected to the address memory unit inputs, - by the inputs of the control and signaling unit and the address inputs of the switch, the first control output of the analyzer is connected to the first information input of the control and signaling unit, the first second, third . The 30th and 4th control outputs are connected to the first ;; - - СГ .г ЦуК-Т, Я the second, the second control, and with the first, second installation inputs of the distributor pulse, the first pulse output of which is connected to the first installation input of the control unit and the signals O, installation and p f} b), the sixth control, whose outputs - -i. U l pogo connected to the third setpoint of the pulse distributor, to the information and first control inputs of the onepaTHBHdft memory unit g- (-.. and%), respectively, the output of the main memory unit is connected to the second installation input of the control and signaling unit, and the second pulse output of the pulse distributor is connected to the control input of the control and signaling unit, the analyzer contains gQ first and second JK triggers, the first element AND, the first and second elements NOT, the first pulse generator, the first counter, the first setpoint adjuster and the NAND element, the output of which is gg keys to the first input of the AND element, and through the first element NOT to the first control output of the analyzer, the output of the first pulse generator is connected to the second input of the first I1 And element, the output of which is connected to the counting input of the second counter, whose outputs through the first setpoint set point are connected to the inputs of the NAND element, the third input of the first And element and the counting input of the second JK trigger are connected to the forward output of the first JK trigger, The J and K inputs of which are connected to the inverse output of the second JK flip-flop, whose J-K and R-codes of which and the R input of the first JK flip-flop are connected to the output of the second element NOT, whose input is connected to the R input of the second counter, the control and alarm unit contains the element AND, with the first eleventh RS flip-flops, first, second and third elements OR, one-shot, element 2И-OR, code converter, decoder, digital indicator, first to sixth keys, first and second display elements, the input of the code converter is the code input of the control unit and signaling, the output of the code converter is connected via the decoder to the digital indicator input, the switching contacts of the keys from the first to the sixth are connected to the zero-potential bus, the opening and closing contacts of the first switch are connected respectively At the S-and R-inputs of the first RS-flip-flop, the output of which is the fifth control output of the control and signaling unit, the make contact of the fifth key is connected to the S-BXO of the fifth RS-TpHrrepa, the output of which is connected to the first the input of the first OR element and to the first input of the 2I-IPI element, the closing contact of the third key is connected to the S-input of the sixth RS flip-flop, whose input is connected to the second input of the 2I element OR, the closing and opening contacts and the first controlling inputs of the third key are connected respectively to the S and R inputs of the third RS flip-flop, whose input is the second control output of the control and alarm unit, the closing and opening contacts of the fourth key are connected respectively to the S and R inputs of the fourth RS flip-flop, the output of which is connected to the R-input of the ninth flip-flop and is the fourth control output of the control and signaling unit, the S-input of the ninth RS flip-flop and the first input of the third element OR are first 12 0 five the information input of the control and signaling unit, the third input of element 2I-OR is the installation output of the control and signaling unit, the S input of the tenth RS-flip-flop is the second information input of control and signaling of the block and is connected to the second input of the third OR element, the output of which connected to the fourth input of element 2И- OR, the output of the ninth and tenth RS-flip-flops are connected respectively to the first and second elements of the display, the closing and opening contacts of the second key are connected respectively to S- and R-inputs. of the second RS-flip-flop, the output of which is the sixth control output of the control and signaling unit, the first and control output of the control and signaling unit is connected to the output of the eighth RS-flip-flop, the S-input of which is connected to the one-vibrator output and is the third control output of the control and signaling unit, the R and S inputs of the eleventh RS flip-flop are respectively the first and second installation inputs of the control and signaling unit, the output is connected to the first input of the AND element, the second input is with the control input of the control and alarm unit, and the output is connected to the second 5 to the input of element 2I-OR, in order to increase the completeness of control, the second and third analyzer control outputs are connected to the second and third informational inputs of the control and signaling unit, respectively. the switch output and the fourth pulse output of the pulse distributor are connected respectively to information0 five 0 The analyzer, the second control input of which is connected to the second pulse output of the pulse distributor, the third and pulse output of which is connected to the third control input of the analyzer and to the second control input of the RAM, a detector zero, a discriminator entered into the analyzer, pulse shaper, first to third elements OR, second and third pulse generators, second generator. setpoints, first through third RS triggers, second through seventh elements 13. 1444714 This element is NOT, the second counter-reversing counter, adder, iplexor, comparison element, setpoint adjuster and setpoint 1, detector zero input and input of the iminator are the analyzer information input, the output of the disator is connected to the first input of the first element OR, the output of which is with the R-input of the second counter, which is not tr with mi to cf, is it w el and then jk el r then il then i ka, the second input of the first element OR the R-inputs of the first, second and third RS-flip-flops, the R-input of the reversible counter and the input of the second element are NOT connected to the output of the second element OR, whose inputs are the second and third control the analyzer inputs, the output of the first pulse generator is connected to the counting input of the first counter, the outputs of which are connected via a serially connected second setpoint adjuster and the fifth element I connected to the S input of the first RS flip-flop, the inverse output of which is connected to the first input of the second eleme This AND, the second input of which is connected to the detector zero output, the third input of the second element AND, and the first input of the sixth element AND are connected to the output of the second / RS flip-flop, the S input of which is the first control input of the analyzer, the output of the second element AND is connected to the counting input of the first JK-flip-flop and with the first input of the third element I, and through the third element NOT with the first input of the fourth element I, the second inputs of the third and fourth elements I are connected to the output of the first JK-trigger, the output of the third pulse generator is connected toThe third and fourth elements I have inputs, a reversible counter input is connected to the output of the fourth element I, and one with the output of the third element I, the forward information outputs of the reversing counter are connected to the first group of information inputs of the multiplexer, the second group of information inputs of which are connected to the output the adder, the input of the first addend of which is connected to the output of the master of code 1, the input of the second addend is 1A five 0 five 0 0 inverse information outputs of the reversible counter, the overflow output of which is connected to the S input of the third RS flip-flop, the direct and inverse outputs of which are connected to the corresponding control inputs of the multiplexer whose output is connected to the first input of the comparison element, the second input of which is connected to the output of the third setpoint the setpoint, the output of the reference element is connected to the first input of the seventh And element, the output of which is the second control element of the analyzer, the second input of the seventh And element, and the first the input of the third element OR is connected to the forward output of the second JK-flip-flop, the second input of the third element OR is connected to the output of the sixth element AND, which is the third controlling output of the analyzer, the third input of the third element OR is connected to the output of the first element NOT, the output of the third element OR is connected to the fourth installation input of the pulse distributor, the second input of the sixth element is And the seventh key, the eleventh trigger, element 11 is connected to the direct output of the first RS trigger j m and fourth OR gate and a third display element, whose input is connected with 5 output of the eleventh RSTTpHrrepa, the R-input of which and the H-input of the tenth trigger are connected to the output of the fourth RS flip-flop, and is the second information block and the first input of the And element, the output of which is connected to the first input of the fourth element OR, the output of which is connected to the R-inputs of the RS-flip-flops from the fifth to the eighth, the second input of the AND element and the first input of the second OR element are connected to the output of the seventh trigger, the S-input of which is connected to the closing contact of the seventh key a, moving contact 0 of which is connected to the zero potential bus, the output of the first element OR is connected to the second input of the second element OR, the output of which is connected to the input of the one-shot, the second The 5th input of the fourth element OR is connected to the output of the element 2И-ШШ. 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