SU1438020A1 - Apparatus for transmission and reception of image signals - Google Patents

Abstract

The invention relates to a technique of television and m. used for the transmission of inventions. The purpose of the invention is to improve noise immunity. The device contains on the transmitting side a readout unit 1. encoder 2, block 4 of buffer memory (PSU), modulator 5, and on the receiving side decoder 8, block 9 BP, decoder 11, block 14 write. To achieve this goal, elements OR 3, 6 and a memory block 7 are inserted on the transmitting side, on the receiving side, the string encoding unit 10, the error detecting unit 13 and the memory block 12. After encoding the line, this allows the image to transmit identifiers and white segment codes (dangerous characters) over the communication channel, and to use the second transmitted dangerous characters on the receiving side to generate an encoded image line and its re-decoding, thereby increasing the noise immunity of the system. 10 il. ate with

Description

vani coded strings; in fig. 6 - 15 element OR 71, RS-trigger 72,

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memory block; in fig. 7 - pulse shaper; in fig. 8 - control unit; in fig. 9 — memory block; in fig. 10 is an error detection unit.

The device for transmitting and receiving the image signal (Fig. 1) contains on the transmitter side readout unit 1, encoder 2, first element OR 3, block 4 of the buffer memory, modulator 5., 25 second element OR 6, block 7 of memory, and on the receiving side a decoder 8, a buffer memory block 9, a string encoding block 10, a decoder 11, a memory block 12, an error detection block 13, 0 a recording block 14.

Memory block 7 (FIG. 2) contains an AND 15 element, an OR 16 element, a shift register 17, an RS flip-flop 18, an AND 19 element, counters 20, 21, an And 22 element, an RS-flip-flop 23, And 24 element, an element OR 25, RS flip-flop 26, shift register 27, counter 28.

The coding unit 10 (FIG. 3) comprises a sync combining selection unit 29, an OR element 30, a pulse generator 31, an OR element 32, a coded string conversion unit 33, an element of a PID 34.

The sync combining combination block 29 (FIG. 4) contains the element OR 35, the element AND 36, the RS flip-flop 37, the shift register 38, the decoder 39, the RS-flip-flop 40, the element 11, the RS flip-flop 40, the element 41, RS-flip-flop 42, descrambler 43, counter 44, RS-flip-flop 45, elements And 46, 47, RS-trigger 48, counter 49, element And 50.

The coded line conversion unit 33 (Fig. 5) contains a read clock pulse generator 51, an AND 52, 53 element, an OR 54 element, a memory block 55, a shift register 56, a control block 57, and

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element And 73, element 74 delay, RS-trigger 75, elements OR 76, 77, RS-trigger 78, element And 79, element 80 delay, counter 81, elements And 82, 83, element 84, RS-trigger 8

The memory unit 12 (FIG. 9) contains a counter 86, an element OR 87, an element AND 88, an RS flip-flop 89, a register 90 dv.

Error detection unit 13 (Fig. Contains And 91 element, delay element 92, counter 93, comparison block 94, AND 95 element, delay element 96, short-circuit trigger 97, SH 98 element, 99 element, 100 delay element, RS -trigger 101,

The device for transmitting and receiving an image signal operates as follows.

From block 1, where the image signal is read during its sweep and quantized, the binary signal and its accompanying clock pulses arrive at the corresponding inputs of encoder 2, in which the binary signal is divided into segments of equal length 1, and if the segment is (at least one), then it together with the identifier 1 through the first element of the W 3, without a change, writes to block 4. In the case of a white segment (all O), then the identifier O is written to block 4 and then 1 - bit number equal to the numbers of the white segments reaching each other. At the same time, in block 7, using clock pulses coming from the output of the second element OR 6, the identifiers and the code of white segmento (dangerous symbols) are recorded. Memory unit 7 is designed to record and store dangerous characters (identifiers and code of white segments and to form the code word necessary to

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element AND 73, element 74 delay, RS-trigger 75, elements OR 76, 77, RS-trigger 78, element And 79, element 80 delay, counter 81, elements And 82, 83, element 84, RS-trigger 85.

The memory unit 12 (FIG. 9) contains a counter 86, an element OR 87, an element AND 88, an RS flip-flop 89, a shift register 90.

The error detection unit 13 (FIG. 10) contains an AND 91 element, a delay element 92, a counter 93, a comparison block 94, an AND 95 element, a delay element 96, a short-circuit trigger 97, an SH 98 element, an And 99 element, a delay element 100, RS-trigger 101,

The device for transmitting and receiving the image signal operates as follows.

From block 1, where the image signal is read when it is scanned and quantized, the binary signal and its accompanying clock pulses arrive at the corresponding inputs of encoder 2, in which the binary signal is divided into segments equal to length 1, and if the segment is black (at least one 1), then it, together with the identifier 1, is written into the block 4 without change through the first element of the NL 3. In the case of a white segment (all O), then the identifier O is written to block 4 and then a 1-digit number equal to the number of d going white segmento . At the same time, in block 7, according to the clock pulses coming from the output of the second element OR 6, the identifiers and the code of the white segments (dangerous symbols) are recorded. Memory unit 7 is designed to record and store dangerous characters (identifiers and code of white segments and to form the code word necessary to

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selection), as well as the transfer of dangerous characters to block 4. When encoding an image line into shift register 17, whose information input is connected to the output of encoder 2 via the Bbrfi element OR 3, the identifiers and the code of white segments are written (dangerous characters), which allows after skinning is recorded in block 10. In the case of L: L, the output of block 13 error detection unit 10 receives a signal permitting decoding of the image line with the second transmitted dangerous characters.

After the decoding is completed and the restored string is written into the block

transmitting the Q 12 memory by a signal from the block 13 about the identifiers and the white segments code (dangerous symbols) about the communication channel 13, and on the receiving side if the identifiers and the white code are affected by interference (determined by the length of the transmitted and restored lines of the image) use the re-transmitted dangerous symbols to form the coded string and re-decode it, thereby increasing the noise immunity of the system.

Upon completion of the encoding of the image line, the signal from the encoder 2 receives a signal allowing the reading of dangerous characters to block 4 and then through the modulator 5 to the communication channel. To separate coded strings and dangerous characters, code words are passed between them (at the beginning and

when errors occur, it is read into write block 14.

When information is read from block 9 in block 10, a signal is generated corresponding to 15 corresponding to the decoding end, which is fed to the corresponding inputs of decoder 11 and error detection block 13. On this signal, decoding is stopped, and in block 13 an error signal is generated if L is 7 L.

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The individual units of the device operate as follows. The signals in memory block 7 are recorded by clock pulses received through the second element OR 6 from encoder 2 by the corresponding 1 code identifiers of white segments, so the black segments in register 17 are not recorded. After encoding the entire image line from encoder 2, a signal is sent to the input of memory block 7, setting the RS flip-flop 26 into 1 and allowing reading the sync code 2 code stored in register 27 through the OR 25 element into block 4. When When reading from counter 28 is completed, the signal sets the RS-flip-flop 26 to O, and the RS-flip-flop 18 to 1. Clock pulses fed to the input of memory block 7 from encoder 2 are transmitted through register 15 and OR 16 to register 17

the end of the line synccode 1 and sync code 2),

At the receiving side, the signal through the decoder 8 and the block 9 enters the block 10 of encoding strings. Block 10 extracts the coded image line from the binary sequence, writes it and simultaneously supplies it to the input of decoder 11. After encoding, the recovered image line is written into memory block 12 and, if it is received correctly, i.e. its length, then from the output of block 12 enters block 14 of the record. Clock pulses

It is recorded in block 10. In the case of L: L, from the output of block 13 for error detection, block 10 receives a signal permitting decoding of the image line with the second transmitted dangerous characters.

After the decoding is completed and the restored string is written into the block

12 memories on a signal from block 13

when errors occur, it is read into write block 14.

When information is read from block 9 in block 10, a signal is formed corresponding to the end of decoding, which is fed to the corresponding inputs of decoder 11 and block 13 of error detection. On this signal, decoding is stopped, and in block 13 an error signal is generated if L is 7 L.

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The individual units of the device operate as follows. The signals in memory block 7 are recorded by clock pulses received through the second element OR 6 from encoder 2 by the corresponding 1 code identifiers of white segments, so the black segments in register 17 are not recorded. After encoding the entire image line from encoder 2, a signal is sent to the input of memory block 7, setting the RS flip-flop 26 into 1 and allowing reading the sync code 2 code stored in register 27 through the OR 25 element into block 4. When When reading from counter 28 is completed, the signal sets the RS-flip-flop 26 to O, and the RS-flip-flop 18 to 1. Clock pulses fed to the input of memory block 7 from encoder 2 are transmitted through register 15 and OR 16 to register 17

come from block 14 to one of the inputs. shift, as well as the counter 20 and the units of the memory block 12. The reading entails shifting the dangerous characters into the restored string according to the signal from the error detection unit 13 and the corresponding beginning of the line on the image. Upon completion of reading from memory 12, a signal is received to decoder 11 permitting decoding of the next image line. When reading the second-transmitted dangerous characters from block 9, in accordance with the identifiers, the code of black segments is added to the HI-CM and the regenerated coded line of the image

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17. When the first dangerous character is written to the last digit of register 17, the RC-flip-flop 23 is set to 1 by the signal from counter 20 and allows the dangerous characters to be written to block 4. After writing the last dangerous character to block 4, the signal from the output of counter 21 establishing RS-triggers 18, 23 and counter 20 in O. Initial installation of counters 20, 21, 28 in O, RS-triggers 18, 23, 26 in O and writing the sync code 2 to the register

27 must be carried out before starting work.

Block 10 is designed to read the binary sequence from block 9, select the coded image line and the second transmitted dangerous symbols, and also form the record and store the image line obtained by replacing the identifiers and the white code in the transmitted line with the second transmitted dangerous characters.

The sync-combi- nation separation unit 29 is designed to read information from block 9, detect the sync pattern of synccode 1 and synccode 2, extract the coded image line and transmit it to the input of decoder 11, generate clock pulses supplied to the decoder 11, and End signals decoding, End of counting of dangerous characters, Resolution of the formation of a coded image line

At the beginning of operation, the KZ-flip-flop 37 is set to 1 and the clock pulses from the input of block 29 through the elements AND 36 and OR 35 are fed to the shift register 38, and also fed to block 9. The information received at the input of block 29 is recorded in register 38. When writing to the synchronization register 38, the synccode 1 at the output of the decoder 39 a signal appears that sets the trigger 40 to 1 and allows the clock pulses to be fed to the counter 44. After entering the counter

44m pulses, it generates a signal that sets the RS flip-flop 37 to O, and the RS flip-flops 48 and 42 to 1. The reading of information from block 9 is terminated. At the output of the shift register 38, a binary signal appears corresponding to the beginning of the encoded image line. Simultaneously, clock pulses start to flow from the output of block 29 to decoder 11 through the OR 34 element. Information is read from block 9 and simultaneously decoded at decoder 11. Decoding ends when sync code 2 is written to sync code 2, which is determined by the decoder 43, the output signal ego sets the RS-trigger

45v 1.

The clock pulses through the element And 46 enter the counter 49 and through

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the element OR 35 in block 9 and in the shift register 38. After a pulse arrives at counter 49m, a signal appears at its output, which sets the trigger to 0 and prohibits reading information from block 9. At the output of register 38, a signal appears that corresponds to the beginning of the sequence of dangerous characters transmitted to the image line. When forming a coded string with the second-transmitted dangerous characters from block 33, the clock, pulses are received at the input of block 29, along which dangerous symbols are read. The occurrence of a signal at the output of block 29 determines the end of the reading of dangerous characters.

The coded line conversion unit 33 is designed to record and store the coded line during its decoding, replace the coded line of identifiers and white code with the second transmitted dangerous characters and, in the event of a submission error, to decoder 11 to re-decode. An RS memory trigger is designed to record and store an encoded image line.

Recording information from the input of block 55 is carried out by clock pulses arriving at the clock input of register 66 through IZh 62 and 63 elements. After recording information to the input of registers 66, the end-of-coding signal sets the RS-flip-flop 65 to 1. Clock pulses from the generator 31 pulses to the input of block 55 through elements AND 64 and OR 62, 63, shift the information recorded in register 66 to the right. When received in register 66 L pulses, counter 61 generates a signal, according to which RS flip-flop 65 is set to O and prohibits filing clock pulses into register 66. In the last digit of de register 66, at the end of the recording, the first binary character of the coded image line will be stored.

The shaper 58 write clock pulses is designed to shift

to the right of the information recorded in the reg-gg gistr 56. At the same time, the output of the register 56 is a signal corresponding to the beginning of the coded line.

Shaper 51 is intended for; supplying a burst of clock pulses at sch0

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information from register 56 and forwards the RS-trigger 72 O. Recording signal worldling End of decoding information into register 56 of block 33

neither The control unit 57 is designed to generate clock signals by which the coded image line with the second transmitted dangerous symbols is written to the register 56 of the coded line;

After reading from the register 38 of the sync pattern block 29 Sync code 2, a signal is generated at its output to enable the generation of a coded string that enters the input of the control block 57 and sets the RS flip-flop 72 to 1. RS-flip-flop 75 is also set to 1. At the first clock the pulse coming from the pulse generator 31 to the input of block 57 and further through the element 38 and the output of block 57 to the shift register 56 is recorded by the identifier for the first digit of the register 56. This information is fed to the input of block 57. If the identifier is O ( Ie code white cross Gmentov), then at the two inputs of the element And 89 will be the level of the log. 1, and a clock pulse delayed by time enters through And 82, ШШ 76, 77 elements to RS-triggers 75, 78 and sets RS-trigger 78 to 1, as well as through delay element 80 to RS-trigger 85 and sets it goes to O. The clock pulses continue to flow through the element AND 73 into block 29 and the code of the white segments is recorded in the register 56 of block 33. Upon completion of the recording, the output of the counter 81 is a signal that sets the trigger 85 into 1 and the opening element And 82, 83. The clock pulse, which records the next identification, goes to the elements And 82, 8 3 and in the event that the identifier 1 (black segment), the RS-triggers 75 and 78 are set to O and 1, respectively. The clock pulses in block 29 are received and the information in register 38 of block 29 is stopped. Since the clock pulses continue to flow to the block 55 from the output of the control block 57, the black segment code is written to register 56 and 33.

After the end of writing to the register

56 of block 33 of the entire coded image line from block 29 to the input of block.

57 control signal is received End of reading of dangerous characters and settings

is terminated.

The memory unit 12 is designed to record and store the decoded image line.

When recording information, clock im-. pulses come from decoder 11 on

inputs of block 12. Readout is carried out on the basis of the signal. Read resolution, coming from block 13 to the input of block 12. After reading the entire image line from the output of block 12

5, a decoder resolution signal is received at decoder 11.

The error detection unit 13 is designed to generate signals Error detection if the length of the reconstructed image line L is not equal to the length of the transmitted line L, and Read resolution in the opposite case.

When decoding from decoder 11 to

Claims (1)

5 input of the counter 93 receives clock pulses. After the signal arrives at the End of decoding, if a binary number equal to L is set at the counter 93, the output of block 94 compares a signal that goes through RS-98 and goes to the RS flip-flop 101 and sets it to 1. In this case, the Start pulse the lines arriving through the AND element 91 are fed to the memory unit 12 and enable the decoded line of the image to be read. Through the delay element 92, the counter 93 is set to O. In the event that the binary number at the output of the counter 93 is not L, then a signal appears at the output of the comparison block 94, which comes through. element And 95 is fed to the output of block 13 (initial installation of the trigger 97 corresponds to 1 at the input of the element And 95). This signal, through time Tj, determined by delay element 96, sets the RS-flip-flop .97 to 1, which allows setting the RS-flip-flop 101 to 1 when the secondary line is decoded incorrectly and allows the restored line of the image from block 12 to match the beginning of the line through the element And 91 in block 12. The formula of the invention A device for transmitting and receiving an image signal containing 0 five 0 five the receiving side are the serially connected reading block and encoder, the clock input of which is connected to the clock output of the read block, and the serially connected buffer memory block and modulator, and on the receiving side the serially connected demodulator and buffer memory block, as well as the decoder and recording block , characterized in that, in order to improve the noise immunity, the first OR element is inputted on the transmitting side, the first input of which is connected to the first output of the encoder, the second OR input, the first and second inputs of which dineny respectively with the second and third outputs of the encoder, as well as a memory unit, the first the input of which is connected to the output of the second-second from the fourth output of the encoding unit of the III element, the second, third and lines, the second input is combined with the third input of the memory unit and connected to the third output of the decoder, the third the fourth inputs are connected respectively to the first, second, and third outputs of the encoder, and the first and second outputs are connected to the second output of the block the strokes are connected respectively to the second recording, and the first and second outputs with the common input of the first HIM element and with the second input of the buffer memory block, and at the receiving side - the coding unit with the third input of the line coding block and the fourth input of the block memory strings, the first input of which is connected to the output of the buffer memory block, the second input of which is connected to the first output of the line coding unit, the second and third outputs of which are connected respectively to the first and second inputs of the decoder, the first output of which is connected to the second input of the line coding block, a memory unit, the first output of which is connected to the third input of the decoder, the second output — to the first input of the recording unit, and the first and second inputs are connected respectively, with the second output of the decoder and with the first output of the recording unit, as well as the error detection unit, the first input of which is combined with the fourth input of the decoder and connected to the input is connected to the second output of the unit Dineny, respectively, with the third input of the coding block of strings and with the fourth input of the memory block. J F1 f 9gL .3 R  I AND w. 9uz.6 evil 5L ti2.5 9g.7 9u, e.S 9U9.10