SU1425786A1 - Access/storage device - Google Patents

Abstract

The invention relates to analog computing, in particular, to sampling-storage devices. and can be used in output signal processing devices of integrated circuits with charge coupling. The purpose of the invention is to increase the speed of the device. This goal is achieved by boosting the control current of the key element in the form of a diode bridge in the Jachal area of the device's sampling time interval. The device contains a block of 1 memory, gated sources of current 2.3, key elements 4-7 on diodes, storage cells. cops 8.9 on capacitors, non-inverting 10 and inverting 11 key amplifiers, one-shot 12. 1 Il. and S (L

Description

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The invention relates to automation and computing technology and may find application in reading devices of the output signals of integrated cjLxeM with charge coupling (AES) and other devices, in which the non-memorization of signal samples,

The purpose of the invention is to increase the speed of the device.

The drawing shows the device sampling-storage. ; The device contains a memory block 1, the first 2 and second 3 gated current brushes, the first 4, the second 5, the third 6 and the fourth 7 key elements on the diodes, the first 8 and the second 9 | accumulative elements on the condensate jpax, the first 10 (non-inverting key) and second 11 (inverting Key) amplifiers, one-shot 12 Control input 13 of the device, in- | The form inputs 14 and output 15 of the device 5 first 16 and second 17 power busses of the device. Bus 16 is supplied with a negative potential; bus 17 is supplied with a positive potential; Unit 1 contains buffer amplifiers; li 18 and 19, accumulative element 20 on the capacitor, key element 21 in the form of a diode bridge. : The device works as follows;

i In the storage mode, at the output of the single-oscillator 12, a low logic signal is generated; at the output of the non-inverting amplifier 1 O, a voltage close to the voltage of the device bus 16, on the element 8, the voltage is close to zero. At the output of the amplifier 11, the voltage is close to the voltage of the bus 17 of the device, on the element 9 the voltage is close to zero. Elements 4 and 6 are in

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At the beginning of the sampling time interval, a high level signal is generated at the output of the single-oscillator 12, and voltages appear at the inputs of amplifiers 10 and 11, the values of which are opposite to the initial and close to maximum voltages. powering the device on the tires 17, and 16, the elements 5 and 7 are closed and the elements 8 and 9 are charged through the opening elements 4 and 6.

After charging elements 8 and 9, at the end of the high-level logic signal at the output of the one-oscillator 12, the output voltages of the amplifiers 10 and 11 return to the original, close to the voltage on the device buses 16 and 17. Elements 4 and 6 are closed, elements B and 9 are disconnected from block 1 and discharged through displaced elements 5 and 7. Upon termination of the high level signal at the output of the one-oscillator 12, block 1 continues to remain in the sampling mode, the voltage at the output 15 becomes more Exactly, this eliminates errors from the differences in the resistances of the internal branches of block 1 and possible errors from the difference in the switching charges of elements 4 and 6. When the high-level signal at input 13 of the device finishes, current sources are turned off and b Lock 1 sample and store goes into storage mode.

The maximum rate of change of the output voltage is observed only at the initial stage of the sampling time interval at the moments of the maximum mismatch of the input and output voltages.

Compared with the known device, the speed increases

closed state. In storage mode four times with sampling error

the current sources 2 and 3 are turned off, the control inputs of the unit 1 do not receive control signals, the unit 1 is in the storage mode and the voltage at the output 15 remains unchanged.

When a sampling signal arrives at input 13, current sources 2 and 3 form a TSC ;, transferring unit 1 to sampling mode, however, the magnitude of this one current is not sufficient to achieve a high value of the rise rate of the high voltage unit 1. On the leading edge of the control signal50

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0.1% signal.

Claims (1)

Invention Formula A sampling-storage device containing a memory unit, the first and BTopojft gated current sources, the control inputs of which are the control input of the device, the input and output of the memory block are respectively the information input and output of the device, the first and second control inputs of the unit the memories are connected respectively to the outputs of the first and second gated sources four times with a sampling error 0.1% signal. Invention Formula A sampling-storage device containing a memory unit, the first and BTopojft gated current sources, the control inputs of which are the control input of the device, the input and output of the memory block are respectively the information input and output of the device, the first and second control inputs of the unit Memories are connected respectively to the outputs of the first and second gated sources, 1425786. 34 The SEC of the current characterized by the first diode and the third cathode is that, in order to increase the fast key elements, the cathode of the device’s action, the first and anode diodes of the third key and the first and second amplifiers are inserted, cumulative elements of the first and second controllers, the first one of the alternating memory inputs of the memory block, the anode and key elements on the diodes, one cathode of the diode of the second key element of the vibrator, the input of which is connected About to the control input of the device, and the output of the first power bus of the device and the course is connected to the inputs of the first and second to the second of the first accumulator of the new amplifiers, the outputs of which of the lower element, the cathode and the anode of the diode are respectively The right key element to the connections of the first and second drives, respectively, to the second bus of the pin elements, the second terminals of which are 15 devices and the second terminal are connected respectively to the anode of the second accumulation element.