SU1424120A1 - Pulse duration discriminator - Google Patents

Abstract

The invention relates to a pulse technique and can be used in devices for processing discrete information. The goal of ibretononi is to increase the resistance of the signal under the influence of impulse noise with a pulse duration shorter than the duration of the pulses of the signals and a period multiple of the period of the g-ra clock pulses. The discriminator contains a pulse generator 1 pulse, a shift register 2 and an element 3 3 For achieving the goal, the input of the pulse width discriminator is connected to the reset input of the shift register 2. The appearance of the input signal with a zero level resets the register 2, which excludes the passage to the output of short noises, the coincidence of the signals with the generator pulses of 1. 2 Il.

Description

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The invention relates to a pulse technique and can be used in devices for processing discrete information.

The purpose of the invention is to increase the noise immunity of the discriminator of the pulse duration when exposed to pulsed noise with a pulse duration that is shorter than the signal pulse duration, and with a period multiple to the period of the I1 pulse generator.

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FIG. 1 shows structural

pulse duration discriminator circuit; in fig. 2 - time diagrams of his work.

The discriminator of the pulse duration contains a generator 1 tacho them "

pulses, register 2 shift and element

And 3.

The discriminator pulse duration works as follows.

An input signal of duration i, and

interference pulses of duration j G are input to the discriminator of the pulse duration, i.e. Inform, fi shift register input fj and simultaneously to the reset reset R, and resetting the register 2 to the zero state is performed by an inverse (zero) level. ila clock approach With register 2 - the sequence of impulse and generator 1 is received.

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Generator 1 pulses record and shift the input signal in register 2.

Claims (1)

The discriminator of the pulse duration does not allow pulses of less than NT duration to be output, where N is the number of bits of register 2, T is the period of the pulse of generator 1. The appearance of an input signal with a zero level resets the register 2, which prevents the output of short interferences that match with generator pulses 1. Formula of invention A pulse width discriminator comprising a clock pulse generator, a shift register, and an element, the clock pulse output is connected to a clock input of the shift register, whose information input is a pulse width discriminator input, and the shift register bits of the shift register are connected to the inputs of the And element, the output which is upstream of a pulse duration discriminator, characterized in that, in order to improve noise immunity when exposed to pulsed noise with a pulse duration s, ikshulsov shorter duration signals and a period ,, multiple of the period of the clock, the input d;: criminalization pulse duration torus connected to the reset input of the shift register. Vj Hh, -i- h "- -k.