SU1403307A1 - Push-pull transistor inverter - Google Patents

Abstract

Image-Utenis refers to electro-electrical and M. b. use; at HJIOCKTH with secondary power sources. The goal is to increase the efficiency of the inverter. The inverter contains power transistors 1 and 2, connected through the output transformer 3 to the output terminals. The sensor 7 of the magnetic state of the core of the output transformer 3 is made in the form of H,: IOC-solenoid, and with a linear magnetic characteristic. The 8.control unit contains comparators 9, II and Shmi.dta triggers 0, 12. Due to the absence of one-side magnetization of the core of the output transformer 3 and the claim: 1, the "through currents significantly reduce the losses in the inverter when switching power transistors 1, 2." when the control pulses are applied, a small pause is automatically generated. 2 h. the item of f-ly, 4 ill. (C (L

Description

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ABOUT

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SO About

The invention relates to engineering technology and can be used and sources for the second time on the electrical engineering systems of radio engineering, automation and computer technology.

The purpose of the invention is the novelty of the efficiency of a transistor inverter.

FIG. I and the scheme e.tektricheski two-stroke transistor inverter; in fig. 2 characteristics of the input of the output of the domestic and norogov1 gkh elements in, at which the most HO.IHO nro в, t 1P with the achieved positive effect; in fig. 3 voltage diagrams on circuit elements; in fig. 4 shows the voltage at the output of the magnetic sensor of the core of the output transformer.

The inverter contains power transistors 1y I and 2 (Fig. 1), output transform Tof i5, with non-| 4 coils 4 and 5, in which the Ii circuit with the middle and high impedance winding fi, the sensor 7 magnetic; the state of the core of the output transformer 3, supra; 1nneny in the form of a new co, 1 en () ida with a linear magnetic character 1, irim) 1 tuner to the core of the output trans (1) of the ormator 3 and b. 8. Inputs. 8. Inputs. 8 inputs and in parallel: a commutator 9 and a Schmitt trigger I), and also a comnator II and a trigger) Schmitt 12, iodk.1K chen151 to the sensor 7 magnetno1CH) core state the output transformer 3, and to the output of the start node 13, which includes two () zener diode 14, the anode of which is connected to the POSITION, 1 pin of the power supply is through two successive 1: 1 Gge, 1 Vc, 1 ) () Transitional1-iiuie RC, -neini 15 and 16. Key 17 is connected to the input of the NS-yeni 16, and (|) () is fixed. And imnu.tis () in 18 and 19 but, the voltage of the Iitani through the key 17 e; 1meig delays 20. For a normal start of the inverter KoMiiapaTOpi) 9 and 1 I and trip e- 1) s Schmitt 10 and 12 do.tzhpy be Id- variate, set to the state, ensuring the operation of one transistor with reliably: 1 open another transistor. The ngggani voltage of the 1st; the first and the negative negative factors are applied to the 9 and 11 komnaratory and Schmitt triggers 10 and 12 are given by means of the power source (in Fig. I, not shown).

Inverter works in the best way possible.

The pulse formers 18 and 19 open the power transistors 1 and 2, iodine voltage and the potential to the base of the latter only when the supply voltage and negative signals at the output of the corresponding Comparators and Schmitt trigger are applied. If at the output of at least one of the elements, the Schmitt comiarator or tripleter, a signal appears, | the negative transducer is not fed to the pulse shaper, then the corresponding transistor is locked. In this way.

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with the open key I /, regardless of the signals at the output of the 9 and 11 komunaratory and Schmitt triggers 10 and 12, the traisistors I and 2 are closed at output 1 1) with 1 oipH- signaling signal (signality; 1 and 18 There is no power supply on the gambling winding. The signal from the sensor 7 is magnetic (1) of the output trans (() o 1mator 3 nr ego) circuit) and the output voltage of the comparators 9 and I 1 this is positive, and the state of the tri1 1 erov is not defined.

D, 1 is made available by iaibol1 1ego e () () of the national theory of comparators and Schmi1 triggers and selects them, and are installed as follows (c). 2). Exit () di (.) E national comparator 9 do.tcnp to be. at a signal from the sensor 7, the south is H1IM H. iH is equal to zero and is negative. But the hpcHriia. ie from the bo sensor, zero. The output of the room I 1 must be () L () Live.;: But at the signal from sensor 7, patient I. TI equals well. but also otnnate, 1no nr si | on, 1e Ch) P1) H1em zero.

11Switching of a tri1te) ai1mntta K.) to a state characterized by denial 11; 1АT, 1 output output voltage, power supply, for example, I am lower than the average price of UI: and my wife, UI a state characterized by a positive output of n 1 m; 1 h reduction; - nr uv. In addition to the input voltage: 1I above the definite) nolo- gous „tn () th value of the UciMii operation viral, such that

lj, - ,, | (l /L/nM,,o./

Because the Schmiter 12 triple switch is in a state of, character, and state of operation, with 1 output voltage, it is irrelevant to the supply voltage and input voltage higher than the positive trigger voltage L .i.i, such that

L 1- | 1 | I U HIIlii / J

and the 1 state, which is characterized by the same output voltage, is the output of the input voltage below the negative release voltage L Mrii, such that

. | ,, | i); / U "n, | .. The switching voltage of the comparators Uiu iM) and UiH.pii, is selected and set at an absolute value such that LiK p) | () / LJinii | 2 /.

The inverter is turned on by closing the key 17. A jump of the voltage occurring at the input of the differentiating RC circuit 16 causes the output of the differentiating RC circuit 16 of the signal, the positive and negative amplitude values of which exceed the value of the direct and reverse breakdown branches of the current-voltage characteristics of the two-anode of the Zener diode 14. In Rez: this is when the key 17 is closed at the entrance

Triggers and comparators are given a pulse, the shape of which is shown in FIG. 3 a. The delay element 20 delays the supply of supply voltage to the pulse shapers 18 and 19 for the time ti (Fig. 3), thereby preventing the power transistors 1 and 2 from simultaneously opening, since, in accordance with the "input-output" characteristics of the comparators 9 and 11 and the triggers 10 and 12 (Fig. 2) at the zero point in time a state is possible in which at the output of each of the comparators 9 and 11 and the Schmitt triggers 10 and 12 there is a positive signal. By the time ti, such a state is eliminated under the influence of a pulse arising when the key 17 is closed. The parameters of this pulse are such that after it ends at the time point, in accordance with the characteristics "input - output comparators 9 and II, and Schmitt trigger 12 are set to a state characterized by positive values of the output voltage, and a Schmitt trigger 10 is set to a state characterized by a negative value of the output voltage (Fig. 3 bd).

The circuit creates conditions for unlocking transistor 2 and locking transistor 1 (Fig. 3e, g). The pulse shaper 19 opens the transistor 2 and through the primary winding 5 a current begins to flow. A positive polarity signal is removed from the output of the magnetic state sensor 7 of the core of the output transformer 3, immediately switching the comparator 9 to a state characterized by a negative value of the output voltage (Fig. 4). As the signal from sensor 7 grows, the Schmitt trigger 10 switches to a state characterized by a positive value of the output voltage, however, the previously switching comparator 9 causes the closed state of transistor 1. As current flows in the primary winding 5, the core of the output transformer 3 becomes saturated, the signal c sensor 7 increases dramatically and at the same time reaches the voltage IF | 2 (Fig. 4). The Schmitt trigger 12 then switches to a connection characterized by a negative output voltage, and the pulse driver 19 closes the power transistor 2. As the current in the collector circuit decreases, the signal from the sensor decreases to zero. When the latter is reached, the comparator 9 switches to a state characterized by a positive value of the output voltage. Thus, at the end of the operation of the transistor 3 at time t2 (Fig. 3), the comparators 9 and 1 and the Schmitt trigger 10 will appear in the state characterized by a positive value of the output voltage, and in the state characterized by the negative

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The output value of the Schmitt trigger 12 is the value of the output voltage. Such a state of the Comparators 9 and 11 and the Schmitt triggers 10 and 12 causes the opening of the transistor 1 at the closed transistor 2, which completely eliminates the "through-current" mode. When transistor 1 is opened, the current flows through the primary winding 4. A negative polarity signal is removed from the output of sensor 7, immediately switching the comparator 11 to a state characterized by a negative value of the output voltage. The transistor 2 continues to remain closed, since two negative polarity signals are active at the input of the pulse driver 14. With a further increase in current and signal from sensor 7, the Schmitt trigger 12 is switched to a state characterized by a positive value of the output voltage, but transistor 2 still remains closed, since the negative value of the comparator output voltage 11 remains.

As current flows further in the primary winding 4, the core of the output transformer reverses in a negative direction and enters saturation, the signal from sensor 7 will increase dramatically, thus reaching the value of Uornin voltage (Fig. 4). The Schmitt trigger 10 then switches to a state characterized by a negative value of the output voltage and the pulse shaper 18 closes the power transistor 1. As the current decreases in the primary winding 4, the signal from the sensor 7 decreases in absolute value to e. When the latter is reached, the comparator 1-1 switches to a state characterized by a positive value of the output voltage. Thus, with a signal from sensor 7 equal to zero, only the Schmitt trigger 10 is in a state characterized by a negative value of the output voltage. Thus, conditions for opening the transistor are created in the circuit at time t.-j (Fig. 3) 2 and hold the transistor 1 closed and the cycle repeats again.

In order for the signals from the sensor not to affect the operation of the power source when the circuit is in operation, a dual-anode Zener diode 14 is installed in the circuit, the reverse voltage and the forward voltage of the current-voltage characteristics of which significantly exceed the signals supplied from the sensor 7.

The signals supplied to the bases of the power transistors, have the form shown in FIG. 3 f, g. With this method of organizing control of power transistors, there is a pause t2- (2 (Fig. 3e, g), which can be significantly reduced by increasing the absolute value of UOTI.IO and Ucpiz. However, dynamic losses of 6 transistors increase because the collector current of the latter can reach unacceptably large values, as evidenced by a sharp increase in the signal from the sensor of the magnetic state of the core (Fig. 4, shown by the dotted line), as a result of which the efficiency drops slightly.

I Thus, along with the lack of loss due to one-sided saturation of the core of a power transformer, there are no losses inherent in the “through-current” mode, and a short pause in the supply

ten

the input of which is connected to the second input terminal, characterized in that, in order to increase the efficiency of the inverter, the first and second comparators and the first and second pulse drivers, the outputs of which are connected to the control inputs of the power transistors, are inserted into the control unit, the input of the first pulse shaper is connected to the outputs of the first threshold element and the first comparator, and the input of the second pulse generator attached to the outputs of the second comparator and the second threshold element, while the inputs of the first and second thresholds x elements, the first and the second comparators, are combined, and the power inputs of the form of the control pulses, forming the pulse drivers are connected to the output

1atically improves reliability

Inverter.

Claims (3)

Formula of Invention the power-on delay element included in the startup node, the output of the installation node of its initial state is connected to the inputs of the comparators and threshold elements. ; 1. Push-pull transistor inverter, Containing power transistors, the emitters of which are connected to the first input terminal, the collectors are connected to the extreme terminals of the primary winding of the output transformer, the middle terminal of which is connected to the second input terminal, the secondary winding is connected to the output terminals, the first and second threshold elements included in the control unit , which are connected to the winding | of the magnetic sensor of the core of the output transformer, and the start node, i / Comparator 3 . 0 the input of which is connected to the second input terminal, characterized in that, in order to increase the efficiency of the inverter, the first and second comparators and the first and second pulse drivers, the outputs of which are connected to the control inputs of the power transistors, are inserted into the control unit, the input of the first pulse shaper is connected to the outputs of the first threshold element and the first comparator, and the input of the second pulse generator attached to the outputs of the second comparator and the second threshold element, while the inputs of the first and second thresholds x elements, the first and second comparators, are combined, and the power inputs of the pulse formers are connected to the output 0 five 0 the power-on delay element included in the startup node, the output of the installation node of its initial state is connected to the inputs of the comparators and threshold elements. 2. The inverter according to claim 1, characterized in that an lIJMHTTa trigger is applied as the first and second threshold elements. 3. The inverter according to claim 1, characterized in that the initial state setting unit comprises first and second differentiating RC circuits connected in series, the input of the first of which is connected to the second input terminal via a key, and the output of the second is connected via a two-channel zener diode inputs of comparators and threshold elements. / f fJG parrfup // Z / # "/ x Unep.g  WMijfnrrja W L / giix. Womn. to Ucp 0 i8zh. and trans. eleven BUT. / trigger UJ / ummaf2 L / 8e ,, x. . one lJcp.7 Sx. but and cf. fZ i / cp .fo Urrep. rrep.rl. off // .W f 4