SU1379910A1 - Device for pulse control of consumer power - Google Patents

Abstract

The invention relates to electrical engineering and can be used for contactless power consumption control. The purpose of the invention is to simplify the device. The device contains a controlled oscillator 4 connected to the first input of the discrete filter 5, the second input of which is combined with the second input of the synchronizer 6 and connected to the output of the detector zero I. The device ensures the accuracy of maintaining the specified power and increases the power factor. 6 Il.

Description

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The invention relates to electrical engineering, namely to pulsed power control devices, and can be used for contactless power control of electrical consumers.

The purpose of the invention is to simplify a device for pulsing the power of an electric sub-grid.

Figure 1 shows the functional diagram of the device; Fig. 2 shows timing diagrams for the operation of the device; FIG. 3 is a discrete filter circuit; figure 4 - timing charts of the pulses at the inputs and the output of the discrete filter; figure 5 - diagram of the synchronizer; figure 6 - timing charts of the pulses at the inputs and the output of the synchronizer.

The device contains a zero detector 1, the input of which is intended to be connected to the mains voltage phase, a thyristor switch 2, the power inputs of which are intended to be connected to the supply mains, and the power outputs are intended to be connected to the load 3. The device is additionally equipped with a controlled generator 4 pulses, a discrete filter 5 and a synchronizer 6, the generator A output being connected to the first input of the discrete filter 5, the second input of which is OB1, interlaced with the second synchronization input 6 and connected to B, 1 detector 1 the pool, the first input of the synchronizer 6 is connected to the output of the discrete filter 5, and the output is connected to the control inputs of the thyristor switch 2. The discrete filter contains a time delay element 7, the output of which is connected to the S input RS-flip-flop 8 whose output is connected to the second input element 9, the first input of which is combined with the input of the delay element 7 and forms the first input of the discrete filter 5, the r input of the cb tripper 8 is the second input of the discrete filter, and the output of the element 9 is the output of the discrete filter 5.

The synchronizer contains an element AND 10, the first input of which forms BTOpoii Bxo; i synchronizer 6, RS-flip-flop 11, the S-input of which forms the first synchronizer input, and the R-input podklk) H (} to the output of the element 12 temporal delay, the input of which is connected to the output of the element And ID and is the output of the synchronizer 6.

The device works as follows.

A variable sinusoidal supply voltage is applied to the detector input 1 (Fig. 1) (Fig. 2a). At the output of detector 1 zero (point b in Fig. 1), at the moments of alternating voltage (Fig. 2a) passing through zero, sync pulses are generated (Fig. 26), which follow with a frequency of 1 00 Hz. At the same time, the controlled generator A (Fig. 1) generates control pulses (Fig. 2b) in the frequency range of 100-200 Hz. The frequency of these pulses depends on the control actions (analog or digital) on the specified generator A and is determined by the required power consumption of the electrical consumer. The pulses generated by the zero detector 1 (Fig. 2b) and the pulses generated by the controlled generator 4 (Fig. 2b) are subjected to discrete filtering. By this, using a discrete filter 5, a pair of alternating impulses is excluded from the two pulse sequences. As a result of this, at the output of the discrete filter 5 (Fig.) A sequence of shear pulses is formed (Fig. 2d).

The operation of the discrete filter and the algorithm for generating extra pulses with a certain frequency ratio is as follows. The first pulse at the time tl of the sequence b (Fig. 4) sets the trigger 8 (Fig. 3) to the zero state, as a result of which a logical zero is present at the first input of the element E9. Next in time is the pulse at the time t2 of the sequence in (Fig. 4), which passes first to the second ejection of the element AND 9 (this output of the element does not pass to the output of this element AND 9, since at its first input there is logical zero), and then to the S input of the trigger 8, putting it into one state. Further, this process is repeated until the pulses of the sequences of the bivs are alternately followed, while at the output of the element 9, which is simultaneously the output of the discrete filter 5, the pulses of the sequence do not appear.

The ituapi changes when, between two pulses of a sequence b, two times of a pulse arrives at times t 8 and t 9 of sequence c (Fig. A). In this case, the pulse t 8 does not pass to the output of the discrete filter, since at the preceding instant of time t 7 the pulse set the trigger 8 to the zero state. However, after the arrival of a pulse at time t 8 to the S input of the trigger 8, the latter is set to one state and remains in this state until a pulse arrives at its R input at time t 10 of sequence b. But after the arrival of the pulse at the moment t 8 of the sequence c, the momentum of the same sequence arrives at the moment t 9, which passes freely at the output of the element I 9 (output g). This pulse of the sequence in does not alternate with one pulse of the sequence b and is, as it were, superfluous (Figure 4d). Consequently, the discrete filter does not transmit on its output r (Fig. 3) alternating pulses of two pulse sequences b and c (Fig. 3), but passes on its output the last pulses of the sequence C, which has a large frequency. The frequency of the extra pulses, as can be seen from the graph (| 1; ig. 4), is equal to the difference between the frequencies of the sequences c and b.

The operation of the synchronizer and the algorithm for linking the extra pulses to the clock pulses is as follows. In the initial state, the output of the trigger 11 (Fig. 3) is zero, therefore the clock pulses at the moments t 1, t 2 and t 3 (Fig. Bb) cannot pass to the output of the And 10 element, which is the output of the synchronizer 6. However, the next extra time pulse at time t 4 (FIG. BG) arrives at the S input of trigger 11 (FIG. 3), put it into a single state. As a result, the next clock pulse at time t 5, arriving at the input b of the synchronizer, passes to its output g, and also this pulse from the output g through the delay element 12 passes to the R input of the trigger 11, converting it to the initial (zero) state. Dale

The considered processes are repeated. Thus, only that sync pulse (FIG. d) passes to output d, which directly

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five

follows the pulse 4 (figg).

The synchronizer 6 binds these extra pulses (FIG. 2d) to the sync pulses (FIG. 2b). As a result, at the output of the synchronizer 6 (Fig. 1), extra pulses (Fig. 2e) synchronized with the moments of the transition of the alternating supply voltage through zero, which include the thyristor switch 2 (Fig. 1), are passed to the input of the load 3, which are uniformly distributed the time of the entire half-periods (Figure 2e) of the supply voltage. The frequency of the excess pulses (Fig. 2d) is equal to the difference between the frequencies of the control and the synchronizing pulses. At the same time, the power of load 3, which is blended as a percentage of the nominal one, is equivalent to the following frequency of the above-mentioned excess pulses.

Thus, using the invention makes it possible to simplify the power control device of the consumer, ensuring the accuracy of maintaining the specified power determined by the stability of the controlled pulse generator, and, unlike the phase pulse control device, avoiding the generation of high-frequency noise and increasing the power factor.

Claims (1)

Invention Formula A device for impulse power control of a power consumer, containing a zero detector, the input of which is intended to be connected to the mains voltage phase, a pyristor switch, the power inputs of which are intended to be connected to the supply mains, and the power outputs are intended to be connected to a load, characterized in that for the sake of simplicity, it is equipped with a controlled pulse generator, a discrete filter and a synchronizer, the generator output being connected to the first input of a discrete switch, the second input of which edinen to a second input of the synchronizer and connected to the output of zero detector vthod first synchronizer connected to the output of the digital filter and an output - to the control inputs tirisgornogo key. tiz tz t7 2 Ji I I I I I s t1 / J if5 J7 tfO // 7 II I I III I tZ i iS t81 // t I if F / U CPU d. 5 Ii J JU 6 t Fig.b