SU1372549A1 - Method of d.c. to a.c. w-stepped voltage conversion - Google Patents

Abstract

This invention relates to the field of electrical engineering for converting a constant voltage to an alternating one with an improved harmonic composition. The goal is to increase the quality of electrical energy. The device contains one modulator 9 with a matching transformer 10 and several demodulators on alternating current switches 6.1 6.2, ..., connected by inputs to different sets of secondary windings, and their outputs are connected in series. At the output, several step-shaped voltages of complex shape are formed, the summation of which allows to obtain quasi-sinusoidal voltage with a large number of steps. 4 il. with (L

Description

fpUl.Z

The invention relates to electrical engineering,

The purpose of the invention is to improve the quality of electrical energy,

Fig. 1 shows voltage diagrams explaining the proposed method for converting a constant voltage to a variable W-step; Figures 2 and 3 are diagrams of a device for converting a constant voltage to a W-step; FIG. 3 is a control block diagram.

The diagrams (FIG. 1) show a rectangular alternating voltage 1, whose frequency is a multiple of the output W-step voltage, intermediate alternating voltages 2-4 M-step with zero pause (,), output W-cTy foam-like voltage 5 ()

A device for converting DC voltage to AC W-step (Fig. 2) contains L demodulators on 6,1-6,4, 7,1-7,4 and 8,1-8,4 alternating current keys, high-frequency modulator 9 with matching transformer 10, (2М + 1) taps 11.-11.5, 12.1-12.5 and 13.1-13.5

groups of series-connected

secondary windings of which are connected to the corresponding lean demodulators, L keys 14–16 of alternating current, the power electrodes of which are connected to the outputs, 19-20 and 21-22 of the corresponding demodulators, are connected in series and connected to the output outputs 23 and 24, and a control unit 25 associated with the control 1 electrodes of the keys of the permanent modulator and the control electrodes of all the keys 6.1-6.4, 7.1-7.4, 8.1-8.4 14-16 AC.

A device for converting a voltage into a variable W-step according to another embodiment (FIG. 3) contains L demodulators on keys 26.1-26.4, 27.1-27.4 and 28.1-28.4 AC, high-frequency modulators 29.1-29.3 with matching transformers 30.1-30.3 (2M-I) of taps 31.1-31.5, 32.1-32.5 and 33.1-33.5 groups of series-connected secondary windings of which are connected to the corresponding demodulators, the keys 34, 35, 36 of variable current, the power electrodes of which are connected to the outputs 37-38, 39-40

with

ten

15 20

thirty

35 40

50

five

and 41-42 corresponding demodulators are connected in series and connected to outputs 43 and 44, and a control unit 45, the same as the control unit 25.

The control unit 25 (45) includes (Fig. 4) a master oscillator 46, which forms the voltage with the frequency and form of voltage 1, a pulse counter 47, a converter of 48 codes and MoiiyiocTH amplifiers 49. Transform codes transforms the pulse parallel binary code coming from the output of the counter into another parallel binary code to control AC voltage cells,

The essence of the method of converting a constant voltage to an alternating and -stage is the summation of the L intermediate variable voltages of the M-step form with a zero pause of a complex form. In the time interval О-Т / 4 and ЗТ / 4-Т of each period of the output voltage (Fig. 1) all intermediate voltages are formed in amplitude stepwise increasing, while the amplitudes M of the steps L-ro of the intermediate voltage 4 are equal to the amplitudes of the first M stages of output W-step voltage 5, and all other (L-1) intermediate variables of voltage (2,3,.) have zero value (,) Obtaining M + I stages of output W-step voltage () is provided by summing two n; comic voltages 3 and 4, with a voltage of 3 in the time interval t ,, - t, must compensate for voltage 4 with the amplitude and form M and (M + 1) level of the output voltage with an amplitude of 5 (M + 1), where Ug - amplitude of the first output stage W-stutgenchatogo voltage

Thus, the voltage 3 in the time interval t must have an amplitude (2M + 1) and, In the time interval t, -t, j, decrease the voltage amplitude 4 by U, which is subtracted from voltage 3 with amplitude () 11, T, e, the output voltage 5 in the time interval is 2M-. In the time interval, the amplitude of the intermediate voltage 4 has a bullet value and the output voltage 5 in the time interval is determined only by the amplitude of the intermediate voltage 3, etc. In this way.

in the interval of each step of the j-ro intermediate voltage to the (j + 1) -th intermediate voltage, the number of steps increases (2M + 1) times. In the time interval t ,, - t, the output voltage 5 must have 13 steps with an amplitude of 13 and „. This is obtained by subtracting from voltage 2 with an amplitude of 254 the sum of two voltages 3 and 4 with an amplitude of 12 Uo, etc.

If we denote: W - the number of steps in the output voltage on the interval (Fig. 1); L is the number of intermediate voltages (Fig. 1); M is the number of steps (without zero) in the initial voltage x 2,3,4 ... (Fig. 1); - the number of stages in the period of intermediate voltages 2,3 ... (Fig. 1), the amplitude of the subsequent initial voltage will be greater than the previous one by B. For example, the amplitudes of the first and second voltage levels 4 are equal to и and 2io. Then the voltages of the voltage levels 3 are respectively 5Uo and 1OUg, and the voltages 2 are 25Ue and 50Ug. Total number of stages l-i

W M In

J- For example, for the voltage in figure 1

2,

W 2- 5 62.

g ° At the initial voltage

(), and, we get

W

2 C 5 312.

When, (therefore, since)

W 3 7 171 g- °

The unevenness of the quantization interval of the levels of the initial voltages 2,3,4 ... is determined by the fact that the amplitude of the last stage from the previous voltage 5 differs in voltage and.

A device for converting a constant voltage to quasi-sinusoidal works as follows.

The high-frequency modulator 9 forms a rectangular voltage 1 on the windings of the matching transformer. At outputs 17-18, 19-20 and 21-22, demodulators are formed, respectively, voltages 4.3 and 2 (,) The outputs of demodulators are connected after

In addition, voltages 5 are formed at the output pins. Key management 6.1-6.4, 7.1-7.4, 8.1-8.4 AC demodulators and AC keys 14-16 is derived from the control unit, which is generally COCTOIST from master oscillator 46 of the counter 47 pulses,

Q converter 48 codes and output amplifiers 49 power.

At output 21-22 of the demodulator in the time interval tjj - t, a voltage of 2 is generated with an amplitude equal to zero.

5 This is achieved by turning off all the 8.1-8.4 AC keys and turning on the additional AC key 16. In the same way, the zero voltage 3 is formed on

0 output 19-20 of another demodulator in the time interval t (j - t.

At output 17-18 of the third form modulator demodulator, voltage is 4 amplitude and in the time interval to-t,

5 by turning on the AC 6.3 key. In the time interval, keys 15,16 and 6.3 AC are included. Voltages of taps 13.2 and 13.4 with respect to 13.3 are equal to 25 Uo,

0 taps 13.1 and 13.5 50U, taps .2 12.2 and 12.4 relative to 12.3 are 5Ug, taps 12.1 and 12.5 IOU, taps от 11.2 and 11.4 on 11.3 are equal to Ug, ings 11.1 and 11.4 2Ug. Therefore, in the time interval to-t, at the output of the voltages, the voltage U is formed due only to the winding 11.1-11.4

At time t, the voltage of the secondary windings changes polarity, and before time t, the key is turned on.

6.1 alternating current, thus providing a connection to the output terminals 23 and 24 of the winding voltage

I1.1-11.3 magnitude 2U. In the time interval, the keys are 6.1, 7.3 and 16 AC, which provides connection to the output pins 23 and 24 of the windings 11.1-11.3 and 12.3-12.4, connected in opposite directions. Therefore, a voltage is formed at the output of the terminals. The time interval includes keys 6.3,

7.2 and 16 AC and at the output pins 23 and 24 is formed eg 5

0

five

0

five

4U life (, 5Uo-Up.

In the subsequent time intervals, tj-t and turn on the keys 7.3, 14,16, respectively; 6.2,

7.2, 16, and 6.4, 7.3, and 16 alternating currents and at the output terminals 23 and 24, voltages 5Uo, о Uj, 51) + 2Uo, are formed. At time intervals t, -tg, tg-t ,, t, -t , o, t, ot ,, and t, | keys 6.4, 7.1, 16 are included respectively; 6.2, 7.4, 16; 7.1. 14, 16; 6.3, 7.4, 16 and 6.1, 7.1, 16 AC and at the output terminals 24 and 23, voltages 8U, 10i, -2i, 9Uo 10Uo-Uo are formed; 10i „; IIU, and 12U, 10Ua + 2U,. In subsequent moments of time t, r -t ,,, t, j -tts,

t, 4-t, g, t, j-t, fi and t, g-t included

respectively keys 6.1, 7.1, 8.3; 6.3, 7.4, 8.2; 7.1, 8.3, 14; 7.4, 6.2, 8.2 and 6.4, 7.1, 8.3 of the alternating current and the output voltages 23 and 24 are formed voltage 1 3Uo 25Uo-l OU, 2Uo; 14U, 25Uo-IOUo-Uo; - 16U 25Uo-lOUo + Uo and 17Uo 25Uo-10Uo--2Uo. Subsequent stages of quasi-sinusoidal voltage are similarly formed by connecting different combinations of secondary windings of a matching transformer.

The principle of operation of the device for converting a constant voltage into a quasi-sinusoidal, made according to Fig. 3, is similar and differs only in the construction of a modulator and a matching transformer. It is used at increased output powers and limited element base. In this embodiment, one common modulator is replaced by several, forming the same voltage 1 of rectangular shape. Automatically on to-. The modulator turns on its own matching transformer and its modulator. The sequence for turning on the AC keys remains the same. Such a construction of the input part of the device has its drawbacks, consisting in the uneven loading of modulators, since the power consumed from the output of the first modulator exceeds the power consumed from the third modulator, at least

12.5 times, it is advisable to sequentially with each secondary winding 33.1-33.2, 33.2-33.3, 33.3- 33.4 and 33.4-33.5 located on the most loaded transformer 30.3, to include the corresponding windings located on the most unloaded matching transformer

five

five

five

0 5

about dp

30.1 etc. Thus, it is possible to increase the load of modulators and matching transformers.

The proposed method of converting a constant voltage to a variable W-step and a device for its implementation in comparison with the known one can dramatically improve the quality of electrical energy by increasing the number of steps to be formed into quasi-sinusoidal voltage. The application of the invention will allow the development of power sources with adjustable output voltage frequency and with improved dynamic characteristics.

Claims (1)

Invention Formula The method of converting a constant voltage to an alternating L-step with uniform quantization in the level and in steps of different duration by converting the constant voltage in L intermediate variable voltages of the M-step form with zero pause and summing them, which differs the fact that, in order to improve the quality of electrical energy, the period of the first intermediate alternating voltage, its phase and the middle of its zero pause are formed coinciding with the period, phase and middle of the zero pause W-step voltage, the duration of its stages is selected equal to (2M + 1) the duration of the respective time steps W-stepped voltage amplitude A ,, its first stage is selected from the expression 1-g I w BUT, W - 1 - -1 - 1. (2M + l) j .U, v,, Where L-1 W M 21 (2M + 1); J-o and, - the amplitude of the first stage W-step voltage, with each j-e of the remaining intermediate variable voltages being formed in amplitude in steps increasing from a negative value to a positive and stepwise falling from a positive value to 71 negative at each stage of the (J- 1) -th intermediate alternating voltage, respectively, with positive and negative values of the derivative of the first harmonic of the W -stage voltage, the differential voltage levels of the j-ro intermediate alternating voltage are chosen to be 3725А98 The (2M + 1) durations of the W-step voltage stages corresponding in time, and the amplitudes of the 5 j-ro stages of the intermediate alternating voltage are chosen (2M + 1) times less than the amplitudes of the corresponding stages (jl) -ro of the intermediate variable voltage wives ., "% U, iimflmBmmhn.L-, jniOihi-jb-jihjK j4jkjj jhji Un u Lj / Tyv r -vty -vTl  llll .ж / i ±: о.г (,, ,, Ж1ш ,,, {27.3 / 2U Z8J 282 (C28. 2d g Lj HF ,,, Ж1ш ,,, 72 {27.3 / 2U Z8J 282 39 Js J U2.3 l / r. 0 0 (C28. one 36 2d g Jn Moffy / rx / nopa 6 i // ru 9r.9.Z, 29.3) FIG L ||| J feSbr