SU1365310A1 - Method of producing quasi=sine stepped output voltage of inverter - Google Patents

Abstract

The invention relates to electrical engineering and m. used in systems of secondary power supply, electric drive and automation. The goal is to increase the quality of the output voltage by increasing the number of stages. With this method of obtaining the quasi-sinusoidal step output voltage of the inverter, the main alternating rectangular voltage is formed with pauses at zero on each side of the half period and summed it with two additional alternating voltages having symmetric alternating pulses to the left and right of the middle of the half-period with pauses at zero. The summation of the main, first and second additional stresses is made with weights equal to 0.71, respectively; 0.23; 0.06. An eight-stage quasi-sinusoidal voltage is formed in the load. 3 pe. with $ (L S

Description

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ABOUT

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eleven

The invention relates to electrical engineering and can be used in the systems of secondary power supply, electric drive and automation to convert constant voltage into alternating quasi-sinusoidal.

The purpose of the invention is to increase the quality of the output voltage by increasing the number of stages,

FIG. 1 shows an inverter cell diagram; in fig. 2 is a block diagram of a device implementing the method; HaJ FIG. 3 - voltage diagrams.

The primary windings of the transformer are included in the diagonal of the bridge of each cell on transistors 2-5.

The converter contains a clock generator 6, a pulse distributor 7, consisting of a five-bit frequency divider and a decoder, the main 8 and. Additional 9 and 10 inverter cells, made, for example, according to a bridge circuit and connected in series to the output res load 11.

The method is implemented as follows.

The pulses of the clock generator 6 are fed to the input of the distributor 7 pulses and form control pulses at its outputs, which arrive at the inputs of the transistors of the main 8 and additional 9 and 10 inverter cells, the output voltages of which are summed at the load 11.

At the output of the main inverter cell, rectangular bipolar fundamental frequency pulses are formed with a pause at zero on each side of the half period equal in width to 1 dl.

period shares (22.5 el.grad.) VQC (Fig. 3) ..

At the output of the first additional inverter cell, two-polar Udop pulses of the increased frequency (Fig. 3) are formed symmetrically with respect to the middle of the half-period, the first one from the middle of the half-period coinciding with the polarity of the pulses of the main inverter cell and is equal to

Irina - part of the period (33.75 l.grad.), followed by a pause on

zero wide

1 16

parts of the period

(22.5 el.grad.), Pulses of negative and positive polarity and

102

.one

again a pause at zero all the width of the period (11.25 EL. grades.). At the output of the second additional inverter, the cells form two-pole symmetric pulses of the frequency Odpag (Fig. 3) symmetric about the middle of the half-period, the first pulse from the middle of the half-period coincides with the polarity of the pulses of the main inverter cell (positive polarity), then a pause for yule, negative polarity impulse of positive, negative polarity and again pause for

zero, all wide - part of peri32

0 5

0

five

0

five

0

five

ode (11.25 el.grad.) and a positive polarity pulse width

JT- part of the period (22.5 el.grad.).

The output voltages of the main and additional inverter cells are summed with the weighting factors, respectively, equal to 0.71; 0.23; 0.06 at load 11, where a quasi-sinusoidal eight-step voltage 15 is formed, the harmonic coefficient of which does not exceed 5.6% with a predominant harmonic content with numbers 31 and 33, and the harmonic content close to the main one (3rd and 5th d), does not exceed 0,25%.

Claims (1)

Invention Formula The method of obtaining a quasi-sinusoidal step output voltage of the inverter, in which the main voltage is formed, having a pause at zero on each side of the half period, equal to the sixteenth fraction of the period, and summed with an additional alternating voltage, having left and right from the middle half-period, symmetrical pulses of different polarity with pauses at zero with appropriate weighting factors, characterized in that, in order to improve the quality of the output voltage by increasing the number of stages the width of the first positive pulse to the left and to the right of the middle of the half-period of the additional voltage is chosen equal to 3 52 parts of the period following it one pause choose width-gt-part neI about fPas.i ten fPa8.2 V additional 1 .g ьг - аъ Uh Fig.Z.