SU1368895A1 - Device for situational check and control - Google Patents

Abstract

The invention relates to automation and computer technology and the MO / foff situation of Kv9 to be used in object management systems with a discrete nature of the technological cycle. The purpose of the invention is to increase the accuracy of the device. The essence of the invention consists in the hardware implementation of the control of the situational dynamics of a complex technological system based on the preservation of the transient invariant. The device contains the first 1 and second 2 registers, the first 3, the second 4 and the third 5 blocks of memory, blocks 6 and 7 of the comparison, blocks 8 and 9 of the elements I, the counter 10 addresses, the generator 1 1 clock pulses and the block 12 of control modes . 1 Cp-f-ly, 3 Il. & (L

Description

The invention relates to automation and computing and can be used in object management systems with a discrete nature of the technological cycle.

The purpose of the invention is to improve the accuracy of the device.

The essence of the invention consists in the hardware implementation of the control of the situational dynamics of a complex technical system based on the preservation of the transition invariant.

Improving the quality of control of the system of implemented transitions 5. permissible) can be described by a logical expression

I) (S;) Sr q (S;) D (Sj d (3;). (2)

This condition can be formulated as follows. A transition is invalid if from situation S; when implementing the control command R (S,), the control system turned into such a situation S ,, that the bits of the situation code D (S;), defined by the transient invariant q (S;), change

we are the object - the control unit was modified. Violation of this condition can be achieved if the control unit monitors the adequacy of the response of the control object to the controlled control actions (control commands). 20 A characteristic feature of complex technical systems as control objects is the absence of determinants that the object-control device system functions in an unpredictable manner and external intervention is required. Operation of the control device is thereby blocked.

Figure 1 shows a functional diagram of a device for situational monitoring and control; in FIG. 2, the situation will arise in the next step if in the current situation S; specified communication S; - R (S;) - S, (situation-decision-situation) For the example implementation of the control unit of the systems, the reaction is nondeterministic; FIG. 3 shows the temporary diag- netic character and determine the frame of operation of the mode control block.

The device contains the first 1 and its own set of binary features 30, the second 2 registers, the first 3, the second (the situation code D (S;) was received. 4 and the third 5 memory blocks, the first 6 solution is R (S;) (the command controls with code R (S,) can be done only up to a certain subset P (S,) of the entire set of situations S Thus, the set P (S;) CS determines the set of admissible transitions S; - S ((S;)) The second 7 units of comparison, the first 8 and second 9 units of elements I, the counter 10 addresses, the generator 11 clock 35 pulses and the mode control unit 12.

The mode control block I2 contains the element OR 13, the element

how much the bond (S;) is fic- OR-HE 14, D-flip-flop 15, first 16, sirovannoy. For each situation S; € B 40 second 17 and third 18 elements I. the set D (S;) can be determined a priori based on the study

The device works as follows.

properties of a particular control object.

The binary vector (situation code) from the control object arrives at

Let P (S;) P (S,) US ;. Pvrekhod- 45 information inputs of the register 1. In

controlled system invariant: in the situation S, the binary vector q (S;) is defined, defined in accordance with the expression

q (S;) (g, D (S.)) V (& D (S.)); j -, 1

(l {j / Sj € P (S,)}). (one)

The vector q (S) contains the units in all those bits that are the same for all the vectors D (S;) on P (Si).

Then the condition of correctness of the situational dynamics (the condition corresponds to the fact that the object-control device system functions in an unpredictable manner and external intervention is required. The control device operation is blocked at the same time.

Figure 1 shows a functional diagram of a device for situational monitoring and control; Fig. 2 shows an example of implementation of a mode control block; FIG. 3 shows time diagrams of the operation of the mode control unit.

The device contains the first 1 and 30 second 2 registers, the first 3, the second 4 and the third 5 memory blocks, the first 6

and the second 7 units of comparison, the first 8 and second 9 units of the elements I, the counter 10 addresses, the generator 11 clock 35 pulses and the block 12 control modes.

The mode control block I2 contains the element OR 13, the element

OR NOT 14, D-trigger 15, first 16, second 17 and third 18 elements I.

The device works as follows.

The binary vector (situation code) from the control object arrives at

the end of the search for a previous control command at the output of block 6 a signal appears with a logic level of 1. At the same time, the same signal

50 appears at the output of block 7, since the situation codes received at this moment at the inputs of blocks 8 and 9 coincide. At the same time, block 12 switches the device to the polling mode, Toe. It transmits pulses from generator 11 to synchronous inputs of registers 1 and 2. On the falling edge of each pulse, the control command code from block 4 is written to register 2 and the code

current situation in register 1; If the current situation code coming from register 1 matches the situation code coming from memory block 3, then the outputs of blocks 6 and 7 still contain signals with a logic level 1, and the polling continues.

When the current situation code changes, the output of block 6 appears with a logic level of O, since the situation codes received at its first and second inputs do not match the ear. On elements And blocks 8 and 9, this causes a logical multiplication of the binary vector of the current situation S «, coming from register 1, and the vector of the previous situation Si, coming from block 3 to the transition invariant q (R;), coming from the third memory block 5 .

If D (Sj & q (S;) D (S;) gq (H;),

The TO at the output of block 7 continues to remain a signal with a logic level of 1. In this case, block 12 places the device in search mode, i.e. It stops passing pulses from generator 11 to register clocks I and 2 and starts to pass them to the counting input of counter 10. On the trailing edge of the next pulse, its contents increase by one, providing a consistent sample of information from the first 3, second 4 and third memory blocks. In this case, the vectors D (S, -), R (S;) and q (S;) are selected from the memory blocks, respectively. The address counter operates cyclically, providing a consistent sample of all situation codes D (S;) and all vectors R (S;) and q (Sj). When the vector D (R;) coincides with the vector of the current situation D (R,) stored in register 1, the output of block 6 is a signal with

|. At the same time

a logic level with a logic level of 1 is formed at the output of block 7, and the process is repeated.

If, when changing the code of the current sync pulse on the second and third

When a unit has a month-input block 12 at the same time D (S) 8q (S, (B;) & q (S,), then signals with a logic level

during block 7, the signal O also appears. In this case, at the output of element 13

with a logic level of O. With this, a signal is also generated with a level

unit 12 puts the device in 55logical mode O, locking element

locks, i.e. generally blocks by-17. Pulse feed from generator AND

giving pulses from the generator 1I. Locked. The circuit resides in this case at the second output of the blocking state indefinitely.

12. A log-level signal appears. If necessary, resume operation.

OC, indicating an inadequate response of the control object in the situation R; control action with a command code and R (S;), and further operation of the device is terminated.

Clock 12 works as follows.

In the polling mode (FIG. 3), signals with a logic level I from blocks 6 and 7 are received at its second and third inputs. D-flip-flop 15 is in the zero state at this time. At the output of element 13, a signal is formed with a logic level of 1, and 0

five

0

the pulses from the generator 11, arriving at the first input of the block 12 through the open elements 16 and 18, arrive at the third output - to the synchronous inputs of the registers I and 2.

Suppose that at time t, a change in the current situation at the device input has occurred. Then, after the next pulse, a signal with a level of logic O appears at the second input of block 12, and the circuit goes into search mode: element 16 is locked, element 18 is opened and pulses from generator 11 arriving at the first input of block 12 through open elements I7 and 18 arrive at the third output of the block to the counting input of the counter 10. Another pulse trigger

5 15 is transferred to a single state, ensuring the constant level of a single signal at the output of element 13 in the search mode. After the code is selected from memory block 3

0 situation, coinciding with the current, on the second and third inputs of the block 12-. signals are logic level 1 and the circuit goes into polling mode again. At the same time, with another pulse, trigger 15 is transferred to the zero state.

Suppose that at the moment tj a change in the current situation at the input of the device is unacceptable, then after oche51368895

devices must be forced to translate the trigger 15 in one state.

The adjustment of the proposed device to the real environment of a particular control object is carried out as in a known device by setting a task for each specific situation B; occurring in the technological cycle with the outputs of the corresponding elements of the control, its command code AND the first and second blocks of control elements R (S;), However, besides the AND and the first information input of this, for each situation Sj the control block modes, which has a set of permissible transitions of the second information, clocks P (S;) and, in accordance with the primary inputs, the first, second and third (1), calculates the transition invariant q (S ;). The vectors D (S;), R (S;), q (S;) are entered into the sequential addresses of the first 3, second 4 and third 5 memory blocks, respectively. 20 After that, the device is ready for operation.

command outputs are connected respectively to the output of the first comparison unit, to the output of the clock generator, to the control output of the device, to the synchronous inputs of the first and second registers and to the counting input of the address counter, the installation inputs of the first, second and third memory blocks are connected to the installation formula

25 not devices. 1. Device for situational

control and management, containing 2. The device according to claim 1, of which is l and h adva registers. Two memory blocks, counting the control unit

The address chick, the clock and their mode generator contains the OR element, the elec- pulsob and the first comparison block, the W-NOT, the three AND and D-trig 35

a hero connected by a C input, a single output and a D input, respectively, with the output of the second element AND, with the third input of the OR element and with the output of the OR-NOT element whose input is connected to the second information input of the block and the second input of the OR element, The first input and output of which are connected respectively to the first information are connected to the inputs of the corresponding block upstream, and to the first bits of the second register, the output to the command output of the block, combined with the first and second inputs respectively. the output bits of the first register and with the corresponding information outputs of the first memory block, the code output of the address counter is connected to the code input of the first memory block and to the code input of the second memory block, whose information and bit outputs of the bits are command outputs of the device, the inputs The bits of the first register are connected to the input of the situation codes of the device, characterized in that, in order to increase the accuracy of the device, it contains two blocks of AND elements, a second comparison block, a third memory block and a block control modes, the code input and information outputs of the third memory block are connected respectively to the code output of the address counter and to the corresponding 6

the first inputs of the first and second I blocks, the first inputs of which are connected respectively to the outputs of the corresponding bits of the first register and the corresponding information outputs of the first memory block, the first, second inputs and output of the second comparison block are associated

with the outputs of the corresponding elements of the first and second blocks of the elements of And, and with the first information input of the mode control block, which has the second information, clocking inputs, the first, second and third

command outputs are connected respectively to the output of the first comparison unit, to the output of the clock generator, to the control output of the device, to the synchronous inputs of the first and second registers and to the counting input of the address counter, the installation inputs of the first, second and third memory blocks are connected to the setting ring with the second the input of the second element And, the first input of which is the clocking input of the block, the first, second inputs and the output of the first element And are connected respectively to the second information input of the block, to the output of the second element Nick to the second command output of the block, the first, second inputs and the code of the third element AND are connected respectively to the output of the second element AND, to the output of the OR-NOT element and to the third command sign code.

Claims (2)

Claim 1. A device for situational monitoring and control, containing two registers, Two memory blocks, an address counter, a clock pulse generator and a first comparison unit, connected by the first and second inputs, respectively, with the outputs of the corresponding bits of the first register and with the corresponding information outputs of the first memory block, code the output of the address counter is connected to the code input of the first memory block and to the code input of the second memory block, in which the information outputs are connected to the inputs of the corresponding category in the second register, the outputs of the bits of which are the command outputs of the device, the inputs of the bits of the first register are connected to the input of the device situation codes, characterized in that, in order to improve the accuracy of the device, it contains two blocks of AND elements, a second comparison unit, a third memory block and a block control modes, the code input and information outputs of the third memory block are connected respectively to the code output of the address counter and to the corresponding first inputs of the first and second blocks of AND elements, the first inputs to of which are connected respectively with the outputs of the corresponding bits of the first register and with the corresponding information outputs of the first memory unit, the first, second inputs and the output of the second comparison unit are connected with the outputs of the corresponding elements And of the first and second blocks of elements And and with the first information input of the mode control unit, in which the second information, clock inputs, the first, second and third command outputs are connected respectively to the output of the first comparison unit, with the output of the clock impu ls, with the control output of the device, with the sync inputs of the first and second registers and with the counting input of the address counter, the installation inputs of the first, second and third memory blocks are connected to the installation bus of the device. 2. The device according to π.1, characterized in that the mode control unit contains an OR element, an OR-NOT element, three AND elements and a D-trigger connected by a C-input, a single output and a D-input, respectively, with the output of the second And element, with the third input of the OR element and with the output of the OR-NOT element, the input of which is connected to the second information input of the block and the second input of the OR element, the first input and output of which are connected respectively to the first information input of the block, and to the first command output of the block, combined with second input of the second e element And, the first input of which is a clock input of the block, the first, second inputs and output of the first element And are connected respectively to the second information input of the block, to the output of the second element And to the second command output of the block, the first, second inputs and output of the third element And are connected respectively with the output of the second AND element, with the output of the OR-NOT element and with the third command output of the block. φυε.Ζ