SU1363516A1 - Start=stop demodulator - Google Patents

Abstract

This invention relates to telecommunication technology and enhances noise immunity. The device contains a sync signal detector 1, a NES-AND 2 unit, a storing unit 4, character detectors 5, - 5in, where m is the signal alphabet size, zlt RTOi 6, zl-t & 7, filtering unit 8 , switch 9, block 10 start-stop synchronization, consisting of start-stop trigger 11, reference G-12, counter 13, decoders 14-16, sign skip detector 17, consisting of inverters 18, 18t, multi-input unit 19 coincidence , counter 20 and threshold block 21. The 1st variant of block 8 contains a decoder and m keys. The 2nd variant of block 8 contains a block of encoders and hectares of code comparators.

Description

The invention relates to telecommunications technology and can be used in start-stop receivers for discrete messages.

The purpose of the invention is to improve the noise immunity.

FIG. Figure 1 shows the structural electrical circuit of the proposed demodulator; in fig. 2 and 3 are examples of the performance of a filtering unit.

The start-stop demodulator contains a synchronization detector 1, a non-AND 2 element, a 3 service character codes sensor, a decisive block 4, 5 detectors: - 5 tons of characters, where m is the signal alphabet size, an OR 6 element, an And 7 element, filtrating block 8, switch 9, start-stop synchronization unit 10, consisting of start-stop trigger 11, reference generator 12, counter 13, decoders 14-16, sign generator detector 17 consisting of m inverters 18 - I8in, multi-input coincidence element 19, counter 20 and threshold block 21 ..

According to FIG. 2 filtering unit 8 contains a decoder 22 and m keys 23-: - 23t.

According to FIG. 3, the filtering unit 8 contains (FIG. 3) an encoder block 24 and m code comparators 25. - 25 tons.

Start-stop demodulator works as follows.

In the initial state, the Start-Stop trigger 11 of the start-stop synchronization unit 10 (Fig. 1) is zeroed and keeps the counter 13 of the block 10 and the counter 20 of the skip detector 17 in the same state. When a start / stop codogram arrives, its start sync signal allocated by detector 1 puts the trigger 11 into a working state, which ensures the synchronization phase start. The zeroing potential from counter 13 is removed, and it starts counting the pulses of the second generator 12. Decoders 14-1 connected to the output of counter 13 fix some specific counting states of the counter 13 corresponding to their purpose. The decoder 14 determines the calculated time to

codograms (service digits are transmitted by its known length gg grams) for translating the demodulator into which are further analyzed

in block 8, filtering on their presence (or absence), and in the case of the initial waiting state, if there was no early reset of the trigger 11 from the skip detector 17, meaning that they match

0

25

Q

cov or. from filtration unit 8. The decoder 15 provides a clock synchronization of the reception of the waveform, producing a signal of moments of reference for the decaying unit 4j. The same signal goes to the output of the demodulator and then to the decoder. (not shown), and also goes to the synchronization input of the multi-input element 19 of the coincidence of the character skipping detector 17 for synchronizing the moments of fixation of the fact of the skip of the character. The decoder 16 generates gating pulses at the estimated time of reception of 15 service bits of the codogram and delivers them to the control input of the switch 9, made, for example, in the form of a multiplexer connecting the output trunk to one of the input highways, corresponding to the code number of the control center. Yes; in addition, the combined strobe-pulse of the service bits goes to the And 7 element as a permitting signal.

Signals of received codogram characters

we are from detectors 5-5 post5

pagot on the group information inputs of the decision block 4, the detector 17 skip signs and block 8 filtering. 0 In decision block 4, demodulation of the received signs is performed; the decision on the received code combination sign from the output of block 4 through the demodulator output: down to the decoder for further processing, for example, for parity or decoding of the redundant code. Multiple input element 19 matches. The detector 17 skip signs combined with inverters 18 - 18t detects the fact of non-detection of the sign. The number of undetected (missing) characters,. counted by counter 20, if it exceeds the value specified in threshold block 21, then through the element OR 6 the start-stop trigger 11 is reset before the expiration of the estimated time of the end of the waveform. This reduces the false occupancy time of the demodulator with a false phase; . start-up from interference, which increases the noise immunity of the device, I

In the first initial bits of the code 5

chi - for their compliance with the specified

3. 1

values a priori known at the receiving point.

For this, according to the implementation of the filtering unit 8 of FIG. The 2 specified service code values from sensor 3 through switch 9, controlled by decoder 16 of block 10, are sent to decoder 22 of block 8, where they are converted into strobe pulses that appear on those outputs of decoder 22, whose numbers correspond to the detector number, a fixing character of the signal alphabet carrying the given code combination. The presence of the required sign is fixed by the corresponding key 23–23 t, the signal from the output of which goes to the output of the filtering unit 8 and further to the element NOT-2. If there is no necessary service mark, then the output of the element NOT-II 2 produces a signal through the element AND 7 and the element OR 6, the start / stop trigger 11 of block 10 is reset to the sleep mode at the end of this service mark, since the reset occurs precisely in the absence of the desired service mark. In addition, block 8 provides a dropping in the complete absence of any sign in time with the reception of the service bit.

Let, for example, the signal alphabet of the 8-ary THT be used, the codogram contains one service sign with the a priori known code value 010 transmitted by the signal with the frequency Fg fixed by the third character detector 5. Then the sensor 3 outputs the specified code combination 010, the switch 9 delivers it to the decoder 22 of the block 8 in time to receive the service mark generated by the decoder 14 of the block 10, and the decoder 22 in block 8 generates a strobe-pulse arriving at the third key 23, the other input of which is connected to the output of the third detected zhi-, ph 5 sign. A reset after the end of the service mark will not be only when, among the whole set of realizations recorded by the detectors of 5–5 tons in the conditions of interference, there will be a signal with

 T-.

frequency F 0 | , in contrast to the prototype, where a reset will not occur when fixing detectors of 5–5 tons of realization signs, including false ones.

5 d

B

five

five

16, 4

According to the implementation of the filtering unit 8 in FIG. 3, the specified code value of the service mark from sensor 3 through the switch 9 is fed to the inputs of all code comparators 25 - 25t, and their other inputs receive code combinations carried by the received sign detectors 5 - 5t The conversion is carried out by the corresponding encoders of the block of 24 encoders.

At the same time, the first inputs of all code comparators 25, -25t come from sensor 3, code combination 010, and the symbol F J of the proper service character, if it is detected by the third detector of 5 characters, is converted into the same code combination in the third encoder of block 24. The match is detected by the code comparator 25, the signal from the output of which goes to the NOT-AND element, not allowing an early reset. Otherwise, the filtering unit 8 in the second embodiment operates in a manner similar to the first embodiment.

The first option of filtering block 8 is preferable for the constructive implementation of this block and the entire start-stop demodulator on digital and logic elements of discrete technology, and the second one is used for designing microprocessor components.

Element And 7 provides the clock synchronization of the moment of reset by the signal of the moments of reference and blocks the output of the element NOT-AND 2 in the cycles allocated not for the service bits of the codogram.

Claims (3)

1. A start / stop demodulator containing a serially connected clock detector and a start / stop synchronization unit, the first output of which is the first output of the demodulator and connected to the triggering inputs of the symbol skip detector and the decision block, whose information inputs are connected to the outputs of the detector and to the informational the inputs of the detector skip characters, the output of which is connected to the first input of the element OR, the second input and output of which are connected respectively to the output of the element And and with with top entry block start513 stop synchronization, the second output of which is connected to the zeroing input of the detector of the symbol skip and is the second output of the demodulator, the third output of which is the output of the decision unit, and the third output of the start / stop synchronization unit is connected to the first input of the AND element, characterized in that In order to improve the noise immunity, a NOT-AND element, a switch, a control unit, and a service character code sensor, whose outputs are connected to the information inputs of the switch, the control input and output of which are connected respectively, with the first input of the element I, to the second input of which the first output of the start-stop synchronization unit is connected, and with the first inputs of the filtering unit, the second inputs and outputs of which are connected respectively to the outputs of the character detectors and input /. . . 66 These elements are NOT-AND, the output of which is connected to the third inlet of element I. 2. A demodulator according to claim 1, characterized in that the filtering unit comprises keys and a decoder, the outputs of which are connected to the first key inputs, the outputs of which are the outputs of the filtering unit, the first and second inputs of which are respectively the inputs of the decoder and the second key inputs . 3. A demodulator according to claim 1, characterized in that the filtering unit comprises code comparators and a block of encoders, the outputs of which are connected to the first inputs of the corresponding code comparators, the second inputs and outputs of which are respectively the first inputs and outputs of the filtering unit, the second inputs of which are the inputs of the block of encoders. - / 77 PUS. 2 / 77 Editor T. Lazarenko Compiled by A.Moskevich. Tehred I.Popovich Proofreader A.T. Order 6384/56 Circulation 636 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Proektna St., 4 (PU8,3