SU1339632A1 - Information displaying device - Google Patents

Abstract

The invention relates to automation and computing and can be used in display devices in which incandescent lamps or LEDs are used as display elements. The purpose of the invention is to increase the information capacity of the device. This goal is achieved by the fact that, in a device for displaying information, containing a matrix display panel 1, keys 2 | -2, " along the X coordinate, first decoder 3, groups of keys on thyristors 4 | i ... 4iri-4k | ... 4k.1 according to the coordinate Y, the group of restrictive elements on the resistors 5ii ... 5 | n-5 ": 1 ... 5kp, second decoder 7, keys 6 | -6k are entered on coordinate Y, two counters 11, 12, generator of 10 clock pulses and blocks of elements I81-8k. The introduction of these elements allows an increase in the number of display elements. At the same time, since the display elements and the thyristor keys operate in permissible current modes, this device has high reliability. 2 Il. S SL WITH WITH WITH OI WITH N3

Description

The invention relates to an open circuit and can be used (1) X 1) :) in a display device, to which glow lamps or LEDs are used as display elements,

The aim of the invention is to increase the information capacity of the device and the tins of the display elements used.

FIG. 1 given a block diagram of the device; in fig. 2 is a diagram of the inclusion of panel display elements.

The device contains a matrix display panel 1, a group of keys on thyristors 2 | -2t on the X coordinate, the first decoder 3, a group of keys on the thyristors 4 || ... 4 | „-4к | ... 4к„ on the U coordinate, groups of restrictive elements on resistors 5c -. 5 | n-5k | ... 5k „, keys 6i-6k on coordinate Y, second decoder 7,, blocks 8 | -8k elements I, information outputs 9 | -9l, generator 10 ( clock) pulses and the first 11 and second 12 counters.

The device works as follows.

At the initial time, the counters 11 and 12 are in a state where all their bits contain an "O. At the same time, the logical "1 signal from the output of the decoder 3 is fed to the control electrode of the thyristor 2: while keeping it in the on state, the thyristors 2} -2t are turned off, as from the outputs of the decoder 3. connected to the control electrodes of the thyristors 22-2 ,,,, comes the level of the logical "O. logical "I from the first output of the decoder 7 is fed to the inputs of the connectors And b .. 1ka 8 |, the transfer of the input code to the control electrode1 1 thyristic kzh 4 || 4 | „. From the 7 level logical ntranslator, 1 is also supplied to the key of the block keeping it in the off state. The rest of the keys GI, bz, gj-- 6k are in the on state, i.e., the thyristor cathodes 4 || 4). 4з1 ... 42 „4ч ... 4к„ through resistors 5 || -5 and 5: ii ... 5,4, r- Г) к | ... 5к „and the switched on keys 6i, connected to the negative bus power source. Due to the fact that the input code is generated by an external device during the arrival of a pulse from the generator 10 clock pulses, then the input bus 9 | --9 ,, has a logical level "O which goes to the control electrodes of the thyristors 4 || - 4 | „. These thyristor are included. The remaining thyristors are also connected, since their control electrodes receive a level of logic “O from the outputs of the output cells of the elements I and. C) ihohod pmpu. From the generator of 10 clock pulses, the I 1 counter increases the csioe state isa, and the state of the decoders 3 and 7 changes accordingly. Logical levels 1 output 1, 1H. E.Cirrod thyristor 2 .. |): j3i) eina Cio 1, r. 1uchie. () bottom) emepp () from depkrratora 7 uroyen / yugichesko; lujc tvnayat on the entrance to the CMK Cha (m. which (SbiK .. iK is ch, k-gyuch b (klyukegg. Through the electrons (- block I and 82 block it is allowed first)) supplying input iodine from tires 9 | 9l to control electrodes of thyristors) rop 4.i - 4.in, since the second inputs of the AND block 8 receive the level of the logic "1 from the output of the decoder 7. Depending on the input code, one or another thyristors 421 - 42p from the group turn on. Through the thyristor 2-2 diodes of the matrix panel 1, the anodes of which are connected to the cathode of the thyristor 22, and the cathodes - to the anodes of the thyristors 42i-4u „, the control of the electrodes of which through the elements And Ba of the unit received the level Loyal logic "I, with inputs 9: -9" current flows. With the arrival of the second pulse from the clock generator, the state of the decoders 3 and 7 changes. The logic level "1 goes to the control electrode of the thyristor 2.4 from the output of the deputer 3,

0 razren1a its inclusion. The logic level "1 from the output of the decoder 7 is fed to the input of the key, which causes it to be turned off, the key of the bl is turned on by the level of logic" O, which comes to its input from

5 corresponds to 1 about the output of the decoder 7. U) the logical row “1 from the output of the damper 7 also goes to the inputs of the elements of the E 8.i block, allowing the transfer of the next) control word of the input code to the PA control thyristor electrodes

0 depending on the composition of the input code or other thyristors 4.z | -4.z "pz groups are included. Thyristors 22, 42i - 42p, included in the previous cycle, continue to be in the on state under the action of the flow through them.

5 current. With the arrival of the k-th clock pulse, the code at the outputs of counters 11 and 12 corresponds to the dws equivalent of the decimal number k. In this case, the decoder 3 has a logic level “1 from its output allows the thyristor to turn on, the level

0

sci

1 from the output of the diverter 7,

Nostunnn to the input to, 11Sha 62, causes it to turn off and allows the transfer of the kth word of the input code from the input 1nin 9i-9 through the elements And 8i b.yuk to the control electrodes of the thyristors 4 || --4 | Depending on the state of the input code, certain thyristors 4ii-4 from the group are turned on, and the corresponding LEDs connected to the anodes of the switched thyristors turn on. Vyk, 1yuchenie transistor

0 key 6-.) Termination of current through thyristors 2i-, -tv, - 42 ", which were switched on from the moment of arrival of the first clock pulse from the generator 10 clock pulses to counter i 1 at the moment of arrival of the clock clock . With the arrival of (k +) .5 I u clock and pulse as a result of a change in the state of de1pi (|) of rator 3, nyp occurs, and in turn k.pocha 6 ,,, chgo, in turn. iibLibiiuioi 1, K..1K) Chepps TnpiiCTOfujB 2z. four.

and the corresponding LEDs of the matrix display panel 1, connected to the cathode of the tristor 2z and the anodes of the thyristors 4.31-4, included from the moment of arrival of the second clock pulse at the time of arrival of the (K-f I) -th clock pulse. The logical level "I, coming from the output of the decoder 3, permits the passage of (K-fl) -ro words of the input code through the elements AND 82 of the block to the control electrodes of the thyristors 421-42p. Depending on the composition of the input information, certain LEDs light up connected to the cathode of thyristor 2 and the anodes of thyristors 42i-42l.

The device then proceeds similarly until arrival (the t + nth clock pulse, after which m words of the input code are repeated. The repetition rate of the input words is chosen so as to prevent the matrix LED panel I from flashing. The clock pulse period t is selected Turning off thyristors 2i, 22-2m and 4 || -4k ". Thus, the proposed device allows using incandescent lamps as indicators, LEDs and so on, without limiting their number and provides optics the normal and robust mode display due to the fact that the elements indicating and thyristor keys operate in the permissible current conditions.

Claims (1)

Invention Formula A device for displaying information containing a matrix display panel, a group of keys on thyristors K 1 Coordinate A, whose control electrodes are connected to the outputs of the first generator, the anodes of the thyristors are connected to NINA power, and the cathodes are connected to the corresponding vertical tires of the matrix display panel, the groups of keys on the thyristors along the Y coordinate, the anodes of which are connected to the corresponding horizontal tires a matrix indicator indicator; a group of limiting elements on resistors; a second decoder, characterized in that, in order to increase the information capacity of the device, a pulse generator is introduced into it , two counters, blocks of elements AND, keys, coordinator of V a, the outputs of the second module are combined with the inputs of the first group of block :) elements, inputs of BTOpoi i I pyniii) which are infor; II 0 1H, 1M11 device inputs, the nerve input is k. pg / h;) by the Y coordinate is connected to the last output of the second decoder, and the inputs of the remaining keys. By the Y coordinate are connected to the corresponding outputs of the second information block, the outputs of the And blocks are connected to the control electrodes of the corresponding keys of the groups on the coordinate Y whose cathodes Connected to one pins of group resistors, the other pins of which are connected to the outputs of the corresponding keys in Y coordinate, the output of the pulse generator is connected to the input of the first counter, the output of which is connected to the input of the second counter, the outputs of which are connected to the information inputs of the first decoder, the information input of the second decoder connected to the output of the first counter. 0 K l 2 / 1G tk-1 ...