SU1339545A1 - Device for computing boolean functions - Google Patents

Abstract

The invention relates to automation and computing and is intended to calculate Boolean functions. The purpose of the invention is to improve the speed by eliminating arguments from the process of calculating the Boolean functions, the values of which do not depend on the values. The device has four components; ate

Description

keep multiplexer 1, block — program memory, decoder 3, two groups 4 and AND flip-flops, pulse generator 5, input 6 of the initial setup, element NOT 7, trigger 8, pulse shaper 9, element 10, information inputs 12 and Outputs 13 The positive effect of ensuring the dependence of the process

The device relates to automation and computing technology and can be used to calculate Boolean functions in control and management systems of technical and technological means.

The purpose of the invention is to increase speed by eliminating from the process of calculating the Boolean functions of the arguments, on the value of which the functions do not depend

The diagram shows a device for calculating Boolean functions; FIG. 2 is a flowchart of the algorithm for calculating Boolean functions.

The device for calculating Boolean functions contains multiplexer 1, block 2 of program memory, decoder 3, trigger group 4, pulse generator 5, setup initial input 6, HE element 7, trigger 8, driver 9 pulses, AND element 10, trigger group 11, information inputs 12, outputs 13 „

The device works as follows.

When the signal prohibits the device operation at the input 6 of the initial setup, the negative edge of the first after the pulse inhibit signal appears at the output, the trigger 8 generates a signal to set the trigger group 4 to the initial state. At the outputs of the trigger group 4, the zero code occurs irrespective of the arrival at its clock inputs of clock pulses

Appearance of signal 6, resolution

melting operation of the device, on the negative front of the first clock number, bu, 1; Ev1LU. sJiyuKiuif from the values of their apryMo.fiTOB, оПр-С11еч Влетс that when analyzing the value of any of the arguments of logical functions by the result of the analysis, a conditional transition to the team is formed, according to which the analysis of another argument is made or the result is calculated ., 1 tablo

the pulse coming from the output of the generator 5 pulses, at the output of trigger B, a signal is generated allowing the operation of the group of trigger 4 on the clock inputs On the positive edges of the clock pulses, the commands of the program for calculating boolean functions recorded in block 2 of program memory are invoked

Each command contains the code of the address of the polled argument, arriving at the control inputs of multiplexer 1, the code of the higher bits of the address of the conditional transition, arriving at the information inputs of the trigger group 4, while the information input of its first trigger receives a signal equal to the value of the polled argument - so the low-order bit of the conditional jump code, the address code of the result of the calculated function that is fed to the address inputs of the decoder 3, the result of the calculation of the logical function that is received em on the information inputs of the trigger group 11 „

The enable signal of the recording of the result of the calculation that arrives at the first input of the element I and S

The calculation of Boolean functions is carried out in the following way.

The first program command, which is formed at the outputs of the program memory block 2, when the device is in the idle state, the first information input of the trigger group 4 receives the signal corresponding to the value of the first polled argument of the first function,

the remaining information inputs of the trigger group 4 receive the upper bits of the conditional jump code. Thus, the information inputs of the trigger group 4 form a conditional jump code, which depends on the value of the polled argument and determines which command the device will execute on the first clock cycle.

After the appearance at the installation inputs of the group of triggers 4 of the signal allowing its operation by clock inputs, by the positive edge of the first clock pulse, the code of the conventional transition is written into the group of triggers 4 and is formed at its outputs o By this code at the outputs of memory block 2 programs, the code of the next command is formed, according to which, depending on the value of the argument polled earlier, one of the following arguments of this function is interrogated, or, if the value of the interrogated argument completely defines the value in of the calculated function, the first argument of the next function is queried. In this case, the result of the function calculation is written to one of the triggers of the 1U trigger group.

The result is recorded by one of the clock inputs of the group, triggers 11. The result of the calculation comes from block 2 of the program memory. The number of the clock input is determined by the result address code that goes to the address inputs of the decoder 3 from block 2 of the program memory. The decoder 3 is gated with a pulse. generated by the negative edge of the clock pulse shaper 9 pulses This pulse is fed to the gate input of the decoder 3 from the output element And 10 in the presence at its first input of the recording resolution signal cut ltata which comes from the memory block 2 programming,

After interrogating all the arguments necessary for calculating these Boolean functions, the device can repeat the entire calculation procedure or stop it and execute two empty, meaningless commands that do not affect the calculation results, conditional jump codes that are formed as a result of the execution; these two commands lead to the subsequent execution of one of them

The device is in the mode of executing these commands until the initial installation on bus 6

the signal prohibiting the operation of a group of trigger 4 on the clock input

Dp cyclic repetition of the procedure for calculating logical functions is necessary in the next team, in which there is the result of the last of the computed functions, to form the code of the conditional transition to the first two words of the program

In 1 table is presented the program. calculating functions

Y, V .xj V Xg-x ,;

i g- 7-0)

The graph-diagram of the binary program algorithm, the frame for calculating the functions (1) is presented in Fig2,

Calculation of functions (I) with the values of arguments x 1, x, O,

x 1, x O, X ,, 1, X, 1, 0 the following

With a zero code, the address input of the program memory block 2 interrogates the argument x included in the first computed function. When x 1, the output of the group of triggers 4 generates a conditional transition code 00011 on the first clock pulse,

so at the output of memory block 2

of programs, the command (word) No. 3 is formed.

This command queries the argument X, and since x, 0, the conditional branch code 00100 is generated to command number 4

The transition to this command is performed on the next clock pulse. Then, x is polled and, since Xg 0, the transition to the command is made. No. 7 “Next, x is queried and a transition is made to command No. 8, since x 0. Here

interrogate x. since x 1, go to command no. 11, which records the result of calculating Y, 0 at address O in trigger group 11, and simultaneously performs the first argument of function Yj - X, because x 0, the code is generated conditional transition to koand number 18, where the argument is interrogated; Condition x 1; therefore, a conditional transition to command no. 23 occurs and the argument is interrogated. By the value of x, 0, a transition is made to the command No. 24, by which the value 0 is written to the first address, and a conditional transition to the empty commands No. 30 and 31 is formed. Execution of these commands leads, regardless of the value of the argument being requested. transition in one of them with, therefore, there is a looping program "

Thus, the device performs the calculation of Boolean functions with regard to the values of the arguments included in these functions, thereby excluding parts of the calculation process, without affecting the final result of the calculation, and the calculation process itself depends on the values of the arguments, for example, if x 0, the computation of the first function ends at the first clock cycle, the transition is made to Command 2, which considers the value of the argument x, as an argument of the function Yj, and the value of Y, 0 is written to the trigger group at address 0.

Claims (1)

Invention Formula A device for computing 1-W boolean functions, comprising a program memory block, a multiplexer, a pulse generator, a decoder, a trigger, a NOT element, an AND element, and the outputs of the code of the address of the program memory block being polled are connected to the control inputs of the multiplexer, characterized in that , with The purpose of speeding up is to exclude arguments from the process of calculating Boolean functions, the values of which do not depend on the values, it contains two groups of triggers and a pulse shaper, the device’s information inputs connected to the information inputs of the multiplexer whose output is connected to the information input of the first trigger of the first group , the informational inputs of the remaining triggers of which are connected to the outputs of the address code of the conditional transition of the program memory block, the outputs of the address code. connected to the address inputs of the decoder, gating the input of which is connected to the output of the element I, the first input of which is connected to the output of enabling the recording of the result of the program memory block, the second input of the element And connecting to the output of the pulse former, the input of which is connected to the trigger input of the trigger and the output an NOT element whose input is connected to the output of the pulse generator and clock inputs of the first group of flip-flops, the setup inputs of which are connected to the trigger output, the information input of which is connected to Odom initial setting unit which outputs are connected to the outputs of the second group -triggerov, the clock inputs of which are connected to outputs of the decoder, and the data inputs of flip-flops sec groups connected to the output result value memory unit programs the address inputs of which are connected to the outputs of the first group of flip-flops " Table continuation