SU133681A1 - Device to convert decimal numbers to binary - Google Patents

Description

Devices are known for converting decimal numbers to binary ones, comprising a key-input system of manual input and a decrypter of a decimal code into a binary-decimal.

The proposed device differs from the known ones in that it consists of a generator of shift bursts, their pulses, a t-bit output register (from the number of necessary binary bits), triggers designed to implement fixed delays, a four-bit register for fixing the binary-dec a valid code and two consecutive adders. The output of the four-bit register is connected to one of the inputs of the first adder, the second input of which is connected via delay triggers to the output of the second adder, and the inputs of the latter are connected to the first and third bits of the t-bit output register. The last bit of the output register is connected to the output of the first adder. The generator output of the pulse bursts is connected to the shift inputs of the triggers and registers. A device made in this way can significantly reduce the amount of equipment required compared with known devices of the same purpose.

The functional diagram of the described device is shown in the drawing. It is known that any decimal g-digit number can be represented as

L p „-10 -1 .10- +. . . + p2-10 + pr10,

where n is the number of decimal digits (1, 2...),

pn is the value of the higher digit of the decimal number, which can take values from O ...

No. 133681-2 -

The same decimal number can be represented in a slightly modified form.

V {... (p „. 10 + p„ 1) -10 + p „, 1. 10+ ... + P2 10 + p ,,

Denote the value in homogeneous brackets by Ui, and the result of multiplying it by 10 by v i.

When the device operates, there is a one-to-one conversion of the number from the decimal number system to the binary equivalent in accordance with the recurrence relations

and, U (, 4- / "-; + V, (Ut + Ur2) 2, where EO OO is the final result of the transformation

n «-1 + Рь

where the value "" corresponds to the value of the number to be converted.

Note that multiplying a quantity by a power of two means shifting it by the corresponding number of bits.

The operation of the proposed device is as follows.

The information is sequentially typed on the keypad system of the manual input /, starting from the highest bit. All ten keys (О, 1, 2,. ... 9) of the manual entry system have two pairs of contacts. The first pair of normally open contacts 10 serves to set the code of the input number through the decryptor 11 of the decimal code to binary and decimal on the four-bit, register 12 with a shift. A second pair of normally closed KOiHTaKTOB 13 all keys serves to control the generator 14 bursts of pulses.

Suppose a decimal number 594 needs to be converted into a binary code. The first key is pressed 5. This closes the normally open contact of this key and sets the code 0101 to the four-bit register 12 through the corresponding circuits of the decoder 11 with a shift. The flip-flops of this register are set to the "/" position by closing the corresponding collector circuits of the flip-flops via the decoder and normally open key contacts to the "ground" When the key 5 is released, its normally closed contact closes, which sets the control trigger 15 to the position / and, thus, through the differentiating the chain 16 starts the waiting multivibrator generator 14 packets of pulses. The generator produces the required number of shift pulses. The number of the latter is equal to the output register size //. The shift pulses are fed to the shift inputs 17 of the four-bit register with the shift of the binary-decimal code, two successive adders /// and IV, t-bit output register (t is the number of digits of the number to be converted) and intermediate triggers 18 and 19 required for fixed delays.

The binary-binary number from the four-bit register passes, starting with the least significant bits, through the adder /// to the highest bit) of the output shift register. Adder /// performs sequential summation

“G + 1 - / + P„ - / In this case, Ui VQ + pz. ,

The pulse generator generates t shift pulses (e.g., 20), after which a binary number is set in the output register. The adder / V fulfills the function Vf + i (Ui +

For this purpose, from the output register (from its first and third bits) binary information enters the adder IV. For the example described, adder IV performs the following summation of binary information.

i; i ("1 + s, .22) 5 + 5-22 25- Trigger 20 serves to shift the number by one bit and to get the equality -f / -250.

So, after the first burst of 20 pulses were issued by the generator M, the code O was set on the output register. 00101, and in intermediate triggers 18, 19, 20-010. Then the digit of the t-1st digit of the input number is entered, in this case 9. To do this, press the P key and enter the code 1001 in the four-bit register. When you release the key, the generator of 14 bursts is started and summation is performed in the adders /// and iV .

Adder IV adds the following information.

This information, combined with the code 1001, forms the sum at the output of the adder.

which corresponds to the decimal value of 59.

In the period following the second burst of pulses, preparations are made for the next step of the input, i.e. the contents of the two lower bits of the output register are written in intermediate triggers 18 and 20.

Thus, the circuit is prepared to perform equality

02 {a2 + “2-22). 2 (59+ 59-22). 2 590.

The last entry is the low-order value, in this case 4. Pressing the 4 key in the four-bit register sets the code 0100, which, added to the sum received in adder IV, forms the binary representation of the decimal number 594.-00 ... . . . 1001010010, which after the eye of the next pulse train will be written in the output register.

To enter the received binary number into a subsequent device (for example, into a digital computer) the operator presses the input button 21. In this case, binary information is output to the device output 22, and the output register, intermediate triggers, as well as the triggers of the /// -and IV accumulators are set to zero (bus 23). The four-bit decimal-binary register with the shift of the special setting to the state "O" does not require, because after passing each pack of shift pulses it is automatically cleared of the information recorded in it.

Subject invention

A device for converting decimal numbers into binary ones, having a key input system of manual input and a decrypter of a decimal code into a binary decimal, characterized in that, in order to reduce the amount of equipment required, it contains a generator of packs

-3- №133681

00- - .0101000 00- - -0001010 00-. -0110010

00- - .0110010 00-. -0001001 00- - -0111011,

shift pulses, two adders, a t-bit register (t is the number of necessary bits), triggers used for delay, and a four-bit register for fixing the binary-decimal code, the output of which is connected to one of the inputs of the first adder, the second the input of which is connected via delay delays with the output of the second adder, the inputs of which are connected to the first and third bits of the n-bit register, the last bit of which is connected to the output of the first adder, and the output of the generator of pulse bursts trigger and register inputs

2 /

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