SU1323978A1 - Wide band spectrum analyzer - Google Patents

Abstract

The invention relates to information and measurement technology. The goal of the invention is to expand the frequency range of the analysis in real time with high frequency capability. The device contains a block of input filters 1.1 ... 1.N with keys 2.1 ... 2.N, analog-digital converter 3, a memory block including sections 4.1 ... 4.N, a fast Fourier transform processor 6, a generator 7 clocks and 9 write address counter. The introduction of the binary-puncturing multiplexer 5, the binary-puncturing distributor 8 and the formation of new functional connections provide real-time analysis of signals in the frequency range from 0.15 Hz to 5 kHz with a change in the relative bandwidth from 0.3 to 1 ,, 1 and ,one. sl co o oo co 00

Description

The invention relates to the information-iio-n.i, u (HTC. IbHoi i technique and may be the case.) In the spectral apalysis of nin-band electrical, acoustic, vibraniopic and other signals of the infrasonic and acoustic frequency range.

The purpose of the invention is to detect the frequency range of the real-time analysis with high frequency resolution.

The drawing shows a structural diagram of the proposed low-band spectrum analyzer. :

A wide-band spectrum analyzer contains an input filter block 1.1-1.N with keys 2.1-2.N, analog-digital converter 3, block 4 of memory consisting of N sections 4.1--4.N, binary decimable multiplexer 5, processor 6 fast Fourier transforms, generator of 7 clock pulses. binary puncture distributor 8 and record address counter 9. The inputs of the filters are combined and connected to the signal input of the device, and the outputs are | | without corresponding to. .. 2.1 - 2.N - to the analog-digital converter O output 3, the output of which is connected to the information-input inputs of block 4 memory The outputs of the sections of the memory block are connected via a binary puncturing multiplexer to the input of the fast Fourier transform processor, and the control input of the multiplexer is connected to the command output of the processor. The control inputs of the keys 2.1 - 2.N and the corresponding write enable inputs of the memory block 4.1-4.N are connected to the outputs of the binary gapping distributor 8, the input of which is connected to the output of the clock generator 7, the input of the write address counter 9 and the control the input of the analog-digital converter 3. The address slots of the first section of the memory block are connected to the outputs of the lower bits of the counter 9 write addresses, and the address spaces of each subsequent section are connected to the outputs of the counter 9 with a shift by k bits to the previous ones in star1pih spectrum runs sleduyunoscheniyu to bits.

Analyzer

The input signal through the low-pass filters 1.1-1.N and the keys 2.1-2.N is fed to the input of an analog-to-digital converter operating with a clock specified by the generator of 7 clock pulses. Binary puncturing distributor generates N sequences of non-overlapping pulses, the duration of which is equal to the period of clock pulses, the frequency of the first sequence is equal to the base frequency of clock pulses, and the frequency of each next pilot postpost is 2 times less than the previous one, pnoc.ie. PULSES is used for

connecting the output of the p-th filter to the input of the analog; 1-digit converter and for enabling recording the result of the conversion into the p-th section of the memory block 4. The addresses of the sections of the memory block are connected to the outputs of the bits of the counter 9 write addresses with increasing offset towards the higher bits by steps to the bits, due to which the change of the addresses of the pth section

The block pa.mti is 2 times slower than in the first section. As a result of the joint operation of the binary-puncturing distributor and the write address counter, the samples of the highest frequency subband are recorded in the first section of the memory block and the subrange with the boundary frequency in the r-section are recorded in the p-section. The duration of the recorded signal realization in the pth section is greater than in the first section, which provides a 2 times narrower band.

analysis.

D in no time - in progress and in a time and in a heap llek - sor periodically periodically connects to the input of the processor 6 fast Fourier transform the output of each of the sections of the memory block

for a time sufficient to perform FFT operations, and the access to the first section is accomplished with a frequency that meets the conditions of real-time analysis of the highest-frequency subband, and in the pth section - with a frequency 2 times more

low. With this, real-time analysis of all subbands is provided, and a complete overlap in frequency of the range of the analyzed signals is composition 2. The value 2 determines the limits of the change in the relative width of the analysis. For k 1, we obtain an analysis in octave sub-ranges with a change in the relative bandwidth of only 2 times and with a full frequency overlap 2 (for example, with N 10 - 1024 times). This is the best for the proposed structure of the approximation to the analyzer with the relative relative bandwidth of the analysis.

Binary decimation distributor consists of a trigger-frequency divider

45 to 2, two 14-bit binary counters, the counting inputs of which are connected to the anti-phase outputs of the trigger, and seven logical elements AND-NOT, whose inputs are connected to the outputs of the even-digit counters. The inverse output of the trigger is used as the first output of the switchboard 50, and the outputs of the AND-NOT elements are used as the second and subsequent outputs. A binary-multiplexing multiplexer consists of a multiplexer, made on CG-CKCP7 microcircuits, and similar to the dual-decoupling distribution described. -body with an encoder that converts so far and eight outputs of the distributor. 1 into a signal switch for control buses of the multiplexer. I; i; 1) a 1-bit binary-transceiver and a multiplexer signal are pulses generated in an FFT processor after completing the calculation of the Fourier coefficients in the next subband.

In a specific example of the proposed device, real-time analysis of signals is provided in the frequency range from 0.15 Hz to 5 kHz (overlapping in frequency more than 32 thousand) with a change in the relative bandwidth from 0.3 to 2%.

Thus, the proposed wide-spectrum spectrum analyzer allows the frequency range of the real-time analyzed signals to be expanded.

Claims (1)

Invention Formula A wide-band spectrum analyzer containing a comb of N low-pass filters and L keys, the output of the n-th filter connected to the input of the l-th key (n 1- / V), respectively, analog-to-digital converter, .V-sectional memory block a write address counter, a fast Fourier transform processor, a clock pulse generator, and the filter inputs are combined and input devices, the key outputs are combined and connected to the information input of the analog-digital converter, the clock input of which is 0 five 0 five connected to the output i eMep-aroiin takyuv. x pulses and an input meter; a) address; h ;; - the record, the output of the analog-qi4 transducer is connected to the information input of each section / V section b. yuka memory, address in-.od / g-th section (n 1 --.- V) is connected to the lth output account count of addresses: records, and the address input of the first page (connection is connected to the output of the lower bit, iii of the counter, from the first tem that, with the aim of expanding the frequency range of the analysis in a real-time scale, it introduced a binary decimation multiplexer and a binary decimation distributor, and the first key {/; 1-.V) is combined respectively with the write enable input of the i-th section L of the sectional storage unit and is connected to the n-th binary-thru slot vai distributor (n 1 - .V). the input of which is connected to the output of the clock pulse generator, the output of the "-OUT section .V of the sectional memory block is connected respectively to the n-s.m input of the binary puncturing multiplexer, the output of which is connected to the input of the processor of the Fourier transform the output of the device, and kg-manddy output is connected to the control input of a binary :; -threading multiplex | 1a.