SU1298833A2 - Frequency multiplier - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to expand the amplitude range of the input harmonic. signal. The device contains a full-wave rectifier 1, differentiator 2, amplitude comparators 3, 4 and 7, voltage dividers 5 and 6, block 8 for storing the peak voltage, drivers 9 and 10 pulses, combiner 11. Variable 12 was again introduced support voltage, to-ry m. designed as a voltage divider. 2 Il. 77 h) (. To; o 00 cx oo Fig. Ho

Description

The invention relates to radio engineering, can be used in various computing and measuring devices, which require the conversion of harmonic voltage into a periodic sequence of pulses, the period of which is an integer number times less than m period of the harmonic voltage, and is an improvement of the invention according to the authors . No. 1193764.

The purpose of the invention is to expand the amplitude range of the input harmonic signal.

Figure 1 shows a structural electrical circuit of a frequency multiplier; figure 2 - timing diagrams of the multiplier.

The frequency multiplier contains a two-half-period rectifier 1, differentiator 2, first 3 and second 4 amplitude comparators, first 5 and second. 6 voltage dividers, third amplitude comparator 7, block 8 for storing the peak voltage, first 9 and second 10 pulse shapers, adder 1, shaper 12 variable reference voltage.

The frequency multiplier works as follows.

The input signal voltage (Fig. 2a) is fed to the full-wave rectifier 1, at the output of which a sequence of pulses is formed (Fig. 2b). These pulses in the first 3 and second 4 amplitude comparators are compared with reference constant voltages that are applied to the second inputs of the first 3 and, second 4 amplitude comparators, respectively, from the first 5 and second 6 voltage dividers.

If the voltage levels of the pulses coincide, you remove -1yp from the output of the double-period rectifier I, with the reference voltages U .. and U (Fig. 26),

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The control signals appear at the outputs of the first 3 and second 4 amplitude comparators coming from the first 5 and second 6 voltage dividers, which in the first 9 and second 10 pulse makers are transformed into sequences of pulses. These pulse sequences are fed to the corresponding inputs of the sum of the I1 matrix, the output of which forms a periodic sequence of pulses (Fig. 2B), the period

an integral number of times (for the one shown in FIG. 2 examples is 8 times) less than the input signal period. In order for the duration of the periods of the output pulses within the period of the input signal to be maintained with sufficient accuracy with changes in the amplitude of the input signal, there is in the frequency multiplier

a circuit for forming reference DC voltages, which contains a series-connected differentiator 2, a third amplitude comparator 7, a block 8 for storing the peak

voltage and variable voltage driver 12, which can be made in the form of a voltage divider.

From the output of the two full-wave rectifier I, pulses arrive at the input of differentiator 2, which are shifted in phase by 90 and in the third amplitude comparator 7 are compared5

five

0

five

0

five

0

with a reference voltage U (Fig. 2d) coming from the driver 12. This reference voltage varies in direct proportion to the change in the amplitude of the input signal. At the output of the third amplitude comparator 7, a sequence of pulses (Fig. 2e) is generated, arriving at the control input of the unit 8, the signal input of which is connected to the output of the full-wave rectifier 1.

Upon receipt of each subsequent pulse (figd), in block 8, the previous entry is erased by writing. si and recording of the amplitude level of the next half-wave voltage supplied to the signal input of the peak-voltage storage unit 8. In the time interval until the next pulse (figd), this voltage goes to the first 5 and second 6 voltage dividers to set the reference voltages and and (fig.26).

Claims (1)

5 6 Claims of invention about Frequency multiplier auth. P93764, characterized in that, in order to expand the amplitude range of the input harmonic signal, a variable reference voltage driver was inserted between the output of the peak voltage storage unit and the reference input of the frequency multiplier. Fi.g.2