SU1283666A1 - Analog meter of velocity - Google Patents

Abstract

The invention relates to electrical measurement techniques and can be used in the construction of systems for measuring instantaneous speed values. The aim of the invention is to improve measurement accuracy and enhance functionality. The device comprises a driver 1, one-shot 2 and 6, a measuring device 13, U1HF 16 charge, a voltage source 17, a first level storage device 19, an integrating capacitor 20, an input bus 21, an initial state setting bus 22, and the input elements are AND 3, HE.5, AND-HE 7, D trigger 4, reference frequency generator 8, first bit 9 bit, digital-analog converter 10, second sampling device I1 - level storage, error sensation device 12, generator 14 current, second key 15 bit, comparator 18. Enter These elements allow to increase the measurement accuracy by performing a vernier work relm and allow the speed of random or non-periodic processes to be measured. I cl

Description

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The invention relates to the technique of electrical measurements and can be used in the construction of measurement systems (including automated) instantaneous values of the velocity of random or periodic processes.

The purpose of the invention is to improve the accuracy of conversion and expansion of functionality.

FIG. 1 shows a functional diagram of the device; on ijMr. 2- voltage diagrams at the output of the main blocks; in fig. 3 - principle of dependence approximation).

Analog meter contains driver 1, first one-oscillator 2, element 3, D-thrunger 4, element 5, element 6, one-oscillator 6, element AND-NE 7, reference frequency generator 8, first key 9 bit, digital analogue converter ( DAC) 10, second sampling device 11 - level storage (VHR), error compensation amplifier 12, measuring device 13, current generator 14, second switch 15, charge switch 16, reference voltage source 17, comparator 18, first VHD 19, the integrating capacitor 20, the overlapping pin 21 and the bus 22 of the installation in the initial state the

The output of the imaging unit 1 is connected to the inputs of the first 2 and second 3 single-vibrators, and the input is connected to the input bus 21, the first UHP 19 is connected to the G1 by the first input of the integrating capacitor 20 and the output of the charge key 16, the generator output 8 is the reference frequency of 10 the input of the first key is 9 bits, the control input of which is connected to the output of the element And 3 and the C input of the D-trigger 4, and the output to the control "running of the current generator 14, the input of the current generator 14 is connected to the input of the second key 15 bits, key output 16 charge, the first input of the comparator torus 18 and the first output of the integrating capacitor 20, the second output of which is connected to the output of the current generator 14, the output of the second switch 15, and the D input of the D flip-flop 4, the inverse output of the D flip-flop 4 connected to the control input of the second switch 15 and the input element is NOT 5, the output of which is connected to the input of the D-flip-flop 4 and the installation input of the digital channel25

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govoy Converter 10, the output of which with the information input of the second VHR 11, and the information input with the output of the comparator 18, which controls

5 input key 16 charge and the third input element AND- NOT 7, the first input of which is connected to the first input element And 3 and the output of the first one-oscillator 2, the second input to the second input

 About element 3, to the output of the second single-vibrator 6 and to the inputs of the first 19 and second 11 VHR outputs, the output of the first VHR 19 is connected to the non-inverting input of the error compensation amplifier 12, whose output is connected to the second input of the measuring device 13, and the second of the VHH 11 output connected to the first input of the measuring device 13 and the inverting input

20 error compensation amplifier 12, the source 17 of the reference voltage by the first output is connected to the input of the charging switch 16 and the second output to the second input of the comparator 18, the third input of the And 3 element is connected to the bus 22 for setting the initial state of the converter, the output of the I- element NOT 7 is connected to the first inlet of the first 19 and second 11 of the WCH.

 The device provides the mode of pre- forming the time interval between pulses from the sensor to the speed, both for single and for: second - processes. In the first case

35, the initial state setting bus 22, using an AND 3 element, a trigger 4, and a HE element 5 (Fig. 1), sets the signals for setting the initial state of the DAC 10 and zeroing the integrating capacitor 20 through the second bit 15. The device is ready to register one-time processes. In the case of repetitive processes, the above operations were performed by 45 TOTS in each measurement cycle with their own circuit elements.

The device works as follows.

At time t, an ordinary impulse from the speed sensor (plot a) arrives at the input of shaper 1. The pulse from shaper 1 output, normalized in amplitude and duration, triggers one-shot 2 and 6,

55 at the output of which pulses are formed (respectively, plots 5 and t). The signal from the output of the second one-shot 6 is used as a signal for blanking information stored from the previous cycle in the water economy department II and 19. The interval from the time ti is taken by element 3 and the element NE-NOT 7 begins with the generation of signals from a sample information (plot d - voltage at the output of the element NAND 7) and simultaneous termination of the measurement mode (plot 9 - voltage at the outlet of the element FROM). During the sampling interval t, -tj, in the UHT 11 and 19, voltage levels (plots and and H) are set equal to the residual voltage on the integrating capacitor 20 at time t (plot I) and at the output of the DAC U (plot l). At time t, the formation of a signal at the output of the first one-oscillator 2 (diagram 5) and the mode of sampling information (diagram) cease.

The front of the signal from the output of the element 4. With the help of the Br-trigger 4 and the element NOT 5, a short pulse (plot e) of the positive field is formed, unlocking the second switch 15, which leads to zeroing of the integrating capacitor 20. the pulse inverted by the HE element 5 serves to set the DAC 10 to the initial state — voltage Ui (plot l). At the moment of zeroing of the integrating capacitor 20, a signal (plot) is generated at the output of the comparator 18 for opening the charging key 16, which during a short interval from the reference voltage source 17 charges the integrating capacitor 20 to the voltage (plot and). From the point in time t, the output signal for the first key of the 9th bit (plot) is formed at the output of the element 3. As a result, the pulses of the reference frequency (plot g) from the generator 8 of the reference pulses are fed via a switch 9 to the control input of the current generator J4, which forms a step-down voltage on the integrating capacitor 20 . to the level UHW "(. At time t, the voltage on the integrating capacitor 20 reaches the level Uf ,, C. The first and second inputs of the comparator 10 compares the voltage on the integrating capacitor 20 (current value) and the voltage at the second source output 17 of the reference voltage. When the saw-tooth voltage reaches a level i & a, c, a pulse is formed at the output of the comparator 18 (time point tj, plot c), which causes the integral capacitor 20 to reload to the level U, QK (. And transition do 11AL 10 to a new state Uj (epy.). Further, about The cycles are cyclically repeated. The sawtooth voltage period on the integrating capacitor 20 is maintained by using a pulse-controlled current generator 14, the reference frequency of the reference frequency generator 8, and the reference source 17 and the comparator 18, which set fixed levels of saw-tooth voltage. wives,

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At time tg comes next. blowing pulse from the speed sensor. The first and second single vibrators 2 and 6 are restarted. In the tg-ty time interval, information is cleared (diagrams m, n) in the UH1.1 and 19 of the previous measurement cycle, and the current cycle measurement process continues until time i, B. In the meantime, the next information retrieval mode begins. From a review of the CL plot, it can be seen that the device provides a BpeMemi interval for measuring tj-tf, equal to the time interval to-tg between pulses, followed by a readout from the speed sensor. Thus, each pnc of measurements starts with a delay of an interval of time providing the most accurate information of the preceding cycle. At the moment of time t- / on the current generator 14, the supply and voltage of the reference frequency shuts down and on the integrated capacitor 20 the voltage Ux 5 corresponding to the exact speed reading in the time interval is fixed.

.tg-t- ,, A coarse reading of the speed corresponds to the voltage at the output of the digital laboratory module 10 - and. From plot a it follows that the forcing of the voltage on the integrating capacitor 20 begins with a delay relative to the measurement interval by the time of information sampling — the time interval (plot g). A constant delay of tj-t by the sampling mode results in a systematic error due to a voltage that indicates the value of Uy. A constant error on the exact reference voltage produces a variable error in speed depending on the approximation interval (Fig. 3). To eliminate the systematic error, Liu introduced an amplifier 12 to compensate for errors in the exact reference channel. As a correction voltage, the signal from the output of the DAC 10 is used. It is fed to the inverting input of amplifier 12 with an appropriate scale factor. Thus, the error compensation amplifier operates in the adder mode. Since an error at 4Ux leads to an increase in the speed error by the beginning of the measurement interval, the correction voltage must increase by the beginning of this interval. These requirements are met by the output voltage of the DAC 10.

A distinctive feature of the formation of voltage on the integrating capacitor 20 is the moments of time t2 5 tg, t t5 5 ... s when the reverse stroke is formed in the voltage. Considering that the duration of the return stroke is rather small and does not affect the accuracy of the readings, it should be noted that there is a bi-valued voltage U during the return stroke. In order to eliminate the ambiguity of the definition

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The values of the rough counting speeds can be set in the measuring device 13 in the form of UPP correspondences, and the exact reading of the speed within the approximation interval (Fig. 3) is determined from the ratio

 and",,

where -AV is the velocity interval in the i-th III interval of approximation;

Umo is the normalized value of the exact reference voltage.

Thus, the value of the required 15 velocity is determined by the measuring device 13 as + uVi,

FIG. Figure 3 shows an example of determining the velocity at the point o, the dependence of A-L / T, approximated in steps of 20 according to a rough reading and linearly piecewise according to an exact reading. As can be seen from FIG. 3, the value of the velocity at point a is defined as Va Vj + & V3, where the true value of the velocity VQ ,, differs from that found by the magnitude of a bit. decisiveness of approximation - 4V, i.e.

 WY, .-

The minimum magnitude of the approximation error is not the principle

because it can be preselected by setting the appropriate repetition period of the sawtooth,

Claims (1)

Invention Formula The values and in the device circuitry are a preliminary drawback of the proposed delay of the sampling mode by the time of reverse stroke. This task is solved by applying signals from the output of the comparator 18 (plot to) to the third, input, of the element NE 7. If the length of the measurement interval is a multiple of the period of the sawtooth voltage (plot and), i.e. time tf may coincide with the poles of approximation (points tg 5 tj, t ,,, ..), the start of the sampling mode is delayed by the return time of the specified voltage. This helps to eliminate the ambiguity mode of the voltage reading and The obtained voltage values from the output of the first VHR 19 (after compensation by the error compensation amplifier 12) and from the output of the second VHR 11 are received respectively at the exact reference input and the rough reference input of the measuring device 13 as components of the exact reference U (plot M) and rough counting and (epures). In the measuring device 13, in accordance with the obtained values of the voltages, the corresponding values of the velocities of the exact and coarse values are set. An analog speed meter, containing a driver, the output of which is connected to the inputs of the first and second single-shotrs, a measuring device, a voltage source connected to the input of the charge key, an integrating capacitor 45, the first output connected to the output of the charge key, the first sampling device storage level, an information input connected to the first output of an integrating condenser 50 torus, characterized in that, in order to increase the accuracy of measurement of instantaneous values of speed and expansion opportunities introduced in it 55 reference frequency generator, current generator, digital-to-analog converter, comparator, second sampling device - level storage, error compensation amplifier, two counters, i.e. U because it can be preselected by setting the appropriate repetition period of the sawtooth, Invention Formula disadvantage of the proposed 30th disadvantage of the proposed installation of 35 An analog speed meter, containing a driver, the output of which is connected to the inputs of the first and second single-shotrs, a measuring device, a voltage source connected to the input of the charge key, an integrating capacitor 45, the first output connected to the output of the charge key, the first sampling device storage level, an information input connected to the first output of an integrating condenser 50 torus, characterized in that, in order to increase the accuracy of measurement of instantaneous values of speed and expansion opportunities introduced in it 55 reference frequency generator, current generator, digital-to-analog converter, comparator, second sampling device - level storage, error compensation amplifier, two switch keys, AND-NOT element, AND element, NOT element and D-flip-flop, while the reference frequency generator output connected to the input of the first key of the discharge, the control input of the D-trigger connected to the output of the element And and the C input, and output to the control input of the current generator, the input of which is connected to the input of the second key of the discharge, output of the charging key the first input is a comparator , the second output of the integrating capacitor is connected to the common bus, the current generator output, the output of the second discharge key and the D input of the D flip-flop, the inverse output of which is connected to the control input of the second discharge key and the input of the element liE, output connected to S- the input of the D-flip-flop and the installation input by the digitizing input of the charge key and the third input of the NAND element, the first input of which is connected to the first input of the AND element and the output of the first personal memory, the second input to the second input element I, to the output of the second one-shot, and to the quenching inputs of the first n second sampling devices — level storage, and the output — to the control outputs of the first and second sampling devices — level storage, the second of which is connected to the first input of the measuring device and the inverting input of the error compensation amplifier, and the first to the non-inverting input of the error compensation amplifier, the output of which is connected to the second input of the measuring device, the source of the reference analogue converter, The output 20 of the second output is connected to the second one connected to the information RO of the comparator input, and the third input to the input of the second sampler element I is connected to the level storage bus, and the information from the initial state of the measurement is input to the comparator output - tel. ". ; the main input of the charge key and the third input of the NAND element, the first input of which is connected to the first input of the AND element and the output of the first RF-vibrator, the second input to the second input element I, to the output of the second one-shot, and to the quenching inputs of the first n second sampling devices — level storage, and the output — to the control outputs of the first and second sampling devices — level storage, the second of which is connected to the first input of the measuring device and to the inverting the input of the error compensation amplifier, and the first to the non-inverting input of the error compensation amplifier, the output of which is connected to the second input of the measuring device, the source of the reference voltage Fi. 2 and 7 and fig.Z