SU1277418A1 - Device for automatic controlling of level of data signal - Google Patents

Abstract

The invention relates to telecommunications technology. The purpose of the invention is to increase the accuracy of the data signal control with impulse noise and level jumps. The device contains adjustment blocks 1 and 2, signal amplitude analysis block 3, averaging reversible counter 4, demplexer 5, reversible counters 6 and 7, digital comparator 8. To prevent erroneous adjustments of counters 6 and 7 during pulsed noise, short interruptions The detector 9, the interactive comparator .10, the DAC 11, the timer 12, and the two elements, NAND 13 and 14, are entered into the device in order to connect and jump the level. The received signal is fed to the input of the detector 9, which includes an active full-wave rectifier and an integral torus. Comparator 10 is two-way ovary and ensures that the signal at the input of block 1 is fixed or lowered by 2-3 times (L times compared to the average level of the received signal. At the output of timer 12, a low logic level is generated that prohibits and 14 adjustment counter AB 6 and 7. 1 Il.

Description

The invention relates to telecommunications technology and can be used in data transmission equipment. The purpose of the invention is to povigenie the accuracy of adjusting the data signal with impulse noise and level jumps. The drawing shows the structures on the electrical circuit of the device. The device for automatic adjustment of the data signal level contains the first and second blocks 1 and 2 of the control, block 3 for analyzing the amplitude of the signal, averaging reversing counter 4, demultiplexer 5, first. And second reversing counters 6 and 7. digital comparator 8, detector 9, analog comparator 10, diffraction converter converter 11, timer 12 are two elements AND-NOT 13 and 14. The device operates as follows. The received signal is input to the cascade-connected first and second blocks 1 and 2. The use of two control blocks 1 and 2 in the device is explained next. The speed of the proposed device for automatic adjustment of the data signal level is chosen so that the maximum adjustment speed exceeds the highest rate of smooth level changes in the communication channel. However, using a single adjustment ring, it is difficult at the same time to ensure a large dynamic range and high accuracy under conditions of a rapid change in the input level. The best character of the 1stik in relation to the simultaneous provision of high accuracy, large range and speed of adjustment has a two-stage system. In such a system, coarse and fine adjustment steps are sequentially included, the functions of which in the device perform the first and second blocks 1 and 2 of adjustment. The step of adjusting the coarse stage 9 is chosen equal to half the maximum range of adjustment of the exact stage. In the steady state adjustment mode, only the exact stage works, and the coarse is turned on when the exact stage reaches the extreme state. After the end of the work of the rough stage, the exact stage is switched on again, continuing to follow the smooth change of the level. In this case, the accuracy of the adjustment is determined by the exact step (the second control unit 2, and the dynamic range and speed of the control (the first control unit 1). In the analysis block 3, the signal amplitude is rectified, integrated and compared with the reference value. The block 3 determines the sign of the adjustment of the first and second reversible counters 6 and 7, according to which the pulses next to the frequency are switched to one of the two outputs of the signal amplitude analysis unit 3. This provides an increase or decrease the code of the first and second reversible counters 6 and 7 and the corresponding change in the transfer ratio of the first and second control blocks 1 and 2. In the case when there is no signal that the first and second reversal counters 6 and 7 do not adjust the signals from the outputs of the signal amplitude analysis block 3 elements AND-NOT 13 and 14 to the averaging reversible counter 4, averaging the adjustment signals of the first and second reversing counters 6 and 7. If the change in the level of the received signal is regular, then the output is n guide down counter 4 is a signal that reduces or increases the unit code of the first or second reversible counters 6 and 7 which define the transmission ratio of the first and second blocks 1 and 2 respectively control. The outputs of the averaging reversing counter 4 are switched to the inputs of the first or second reversing counters 6 and 7 by a demultiplexer 5. The control signals from the demultiplexer 5 are generated by a digital comparator 8. It compares the code of the second reversible counter 7 with the codes corresponding to the adjustment limits. If the code set in the second reversing counter 7 corresponds to the adjustment limit, then the digital comparator 8 generates a signal allowing the switching of the adjustment signals from the second reversing counter 7 to

the first reversible counter 6. The switching is carried out by the demultiplexer 5, if the adjustment signal coming from the output of the averaging reversing counter 4 requires a further increase in the code of the second reversible counter 7. Thus, the automatic adjustment of the data signal level switches to the coarse adjustment mode. It continues until the sign of the adjustment does not change and the demultiplexer 5 does not switch the adjustment signals to the second reversible counter 7, which corresponds to the transition to the fine adjustment mode.

To prevent the first and second reversible counters 6 and 7 from being trimmed, during the operation of impulse noise, short interruptions of communication and level jumps, a detector 9 was inserted into the automatic adjustment of the data signal level; analog comparator 10, digital-to-analog converter 11, timer 12 and two elements NAND 13 and 14. The received signal is fed to the input of the detector 9, which includes an active full-wave rectifier and integrator. The detector circuit 9 is similar to the full-wave rectifier circuit with an integrator used in block 3 of the signal amplitude analysis.

The signal from the output of the detector 9 is fed to the first input of the analog comparator 10, the second input of which receives the signal from the output of the digital-to-analog converter 11. The digital-to-analog converter 11, using the information taken from the outputs of the first reversing counter 6, allows it to form: proportional to the average level of the received signal. Thus, in analog comparator 10, the envelope of the signal at the input of the first control unit 1 is compared with the average level of the received signal. Analogue comparator 10 is two-threshold and provides a fixation of the excess or decrease of the signal level at the input of the first control unit 1 by 2-3 times compared with the average level of the received signal.

In case of a sharp change in the level of the received signal at the output of the analog comparator 10, the signal transitions from a high logic level to a low one, which starts the timer 12.

At the output of timer 12, a low logic level is formed, which prohibits the adjustment of the first and second reversing counters 6 and 7 with the help of I-NE 13 and 14 elements. At a time interval at the output of timer 12, a signal is generated allowing the adjustment of the first and second reversible counters 6 and 7. The conversion factor is chosen based on the statistical characteristics of impulse noise, short interruptions of communication and level jumps so that the duration of the inhibit signal exceeds the average duration of any of the interfering factors. s. If several successive impulse noise, short-term interruptions of communication or level jumps occur, each of them has its own logical level difference at the output of analog comparator 10, which restarts timer 12. Thus, the prohibition of adjusting the first and second reversible counters 6 and 7 continues to operate throughout the time of exposure to interfering factors.

Claims (1)

Invention Formula A device for automatically adjusting the data signal level, containing an averaging reversible counter, the outputs of which are connected to the signal inputs of a demultiplexer, the outputs of which are connected to the inputs of the first reversible counter, the outputs of which are connected to the control inputs of the first control unit, the outputs of which connected to the inputs of a digital comparator whose outputs are connected to the control inputs of the demultiplexer and to the control inputs of the second control unit and signal input and output which are connected respectively to the output of the first control unit and to the input of the signal amplitude analysis unit, characterized in that, in order to improve the accuracy of the data signal control during impulse noise and jumps 512774186. A level, a detector is entered into it, two keys to the first inputs of the first and second NI elements and successively of the NAND elements, the second inputs and the digital-to-analog conversion, the outputs of which are connected to the inputs of which are connected to the outputs of the analysis unit. of the first reversible counter-j signal and with the inputs of the averaging, analogue comparator, to the second go reversing counter, the input of which is connected to the output, the detector input of the first block of the regulator, and the timer whose output is Rovani connected to the input of the detector.