SU1259245A1 - Device for determining extremum number from nm-bit numbers - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used in control and monitoring units. The purpose of the invention is to increase speed. The device contains t-rv p inputs of bits of numbers, -rl information outputs of AI address outputs, comparison nodes, each of which consists of an AND-NOT element and two groups ti of an AND-NOT element. The device also contains (tn − 1) hyphenation nodes containing each h of the elements I. In the device code, the direct code h of numbers is received at the inputs of the device. Each i-th comparison node determines the value of the maxi bit (L ffm-4 ff / if.f m-I fa, m-t

Description

1259245

a small number (formed at the output of AND-NOT 5, -, - 5.) a signal to prohibit the analysis of 81 devices). produces (for the lower bits of the corresponding outputs of the corresponding element numbers. 1 Il.

I

The invention relates to automation and computing and can be used in control and monitoring units.

 The purpose of the invention is to increase the speed of the device.

The drawing shows a diagram of the proposed device.

The device contains m nodes I, a comparison, and (i-n-1) node 2, g 2 translations. Comparison nodes contain the elements AND-NOT 3, - the group of elements AND-PE 4, - 5, - 5 ,. The hyphenation nodes contain the elements And 6, 6., .. The device also contains

i GP 1

inputs, - 7, bits of numbers, information outputs 8 and address outputs 9 - 9h.

The device works as follows.

The inputs 7, - 7 receive the direct bits of the compared numbers Q, with the first bit being the highest. If some i-th digit of all numbers is zero (, -%, ... Q. 0), then a single value is set at the output of all elec-. the cops are AND-NOT 4, -4 ,,, and the output of the element IS-NOT 3 (and the output 81 of the device is zero. In this case, the logical unit at the output of all the elements AND-H 1 i and 1 of the same node 1 of the comparison.

If in the 1st bit of some numbers there is zero, and in other cp, 1 is one, then the zero value will be at the outputs of the AND-HE 4p, i elements, and at the output of the AND-HE 3i element - one. At the same time, the output of the AND-HE elements is 5oi, i, the corresponding bits of QJ. with a zero value, the logical zero is set, which enters the inputs of the corresponding AND-NOT elements of the next node 1-, comparison, and through the nodes 2-, 2, ..., 2, transfers to the corresponding elements AND-NOT .ng VbJ -. sets

at their outputs, the signal of a logical unit, thereby excluding the corresponding number of A from consideration of 1.

As a result, at the information outputs 8-8 of the device, the code of the maximum number A -A is formed. A.

1 h

a signal of a logical unit is set on one (or several, in case of equality of several maximum numbers) from a. direct outputs 9, - 9, the number of which corresponds to the maximum number.

If the outputs 7,, - 7, are supplied in the inverse code, then on the outputs 8 - 8. the inverse code of the minimum number is formed.

Claims (1)

Invention Formula A device for determining the extremal of binary binary numbers, containing m comparison nodes and (bi - 1) hyphenation nodes, each comparison node contains an AND-NOT element and the first group of IS-NOT elements, each of which contains a group of n elements I, and the input of the 1st bit j-ro of the analyzed number, where 1 1,2, ..., H1, j 1,2, ..., n is connected to the first input of the j-ro element I- The NOT of the first group of the 1st comparison node, the output of the j-ro of the AND-NOT element of the first group 1-g of the comparison node is connected to the JM input of the AND-NE element of the same comparison node whose output is 1 the m information output of the device, the first input of the j-ro element of the K – th transfer node, where k 1,2, ..., (nl- 2), is combined with the second input of the j-ro element of the NAND of the first group (k + 2) of the comparison node, the output of the j-ro element of the infrared transfer node is connected to the second input of the j-ro element of the AND (k-l 1) -th transfer node, the output of the j-ro element of AND (b, - 1 a) of the hyphenation node is JM addressable At the output of the device, the second input of the j-ro element AND the first transfer node is combined with the second input of the j-ro element AND-NOT of the first group of the second comparison node, characterized in that, in order to improve speed, each comparison node contains a second group of NAND, and in each comparison node the first inputs of all the elements of the NAND of the second group are combined and connected to the output of the NAND element of the same comparison node, the output of the j-ro element of the NAND of the first group of the i-ro comparison node connected to the second input of the j-ro element-15 th node of the comparison, . Editor O. Yurkovetska Order 5122/46 Compiled by V.Gorokhov Tehred I.Popovich Proofreader M.Maksimishinets. Circulation 671 Subscription VNIIGSh of the USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, ul, Proektna. four That IS-NOT of the second group of the same comparison node, output of the j-ro element AND-NOT of the second group of the f-ro comparison node, where J 1,2, ..., (t-1) is connected to the second input of the j-ro element AND-NOT of the first group (T 1) of the comparison node, the output of the J-th element AND-NOT of the second group of the Sh-th comparison node is connected to the second input of the -th element AND (.- 1) -th transfer node, output j - The first element and the K-th node carries to the third input of the J -th element AND-NOT of the first group (L + 2)