SU1256031A1 - Signature analyzer - Google Patents

Abstract

The invention relates to digital computing and can be used to monitor and diagnose digital equipment. The aim of the invention is to reduce the time of detection of multiple distortions of input signals in one of the cycles of operation of a multi-output control object. The signature analyzer contains two registers, a shift register, a group of And elements, and a group of modulo-two adders. The first register is intended to select a set of controlled outputs of the control object. The memory elements of the second register provide a time shift of the output signal sequences, and modulo-two adders sum the output signals in each clock cycle, taking into account the time shift. In this case, repeated distortion of the output signals in one of the cycles of operation of the control object leads to distortion of several bits of the total sequence, which ultimately leads to a reduction in the time of detection of such distortions. 1 il. N5 SL 05

Description

The invention relates to digital computing and can be used to monitor and diagnose the digital equipment used therein.

The purpose of the invention is to reduce the time of detection of multiple distortions of input signals in one of the cycles of operation of a multi-output control object.

The drawing shows the functional diagram of the signature analyzer.

It contains the first register 1, the shift register 2, the second register 3, the group of elements I 4, adders 5 and 6 modulo two, the group 7 of information inputs, the synchronous input 8, the group 9 of information outputs.

Signature analyzer works in the following way.

After supplying power, registers 2 and 3 are set to the zero state, and register 1 is written with a binary code corresponding to the set of analyzed outputs of the control object. The signals from the outputs of register bits 1 set to one state are fed to the second inputs of the I 4 elements, allowing the signals from the test object to pass through the corresponding information inputs 7 to modulators two 5 and 6.

Then, the inputs 7 of the signature analyzer are fed with signals from the outputs of the monitored object Xi (t), X2 (t), ..., xm (t), and input 8 is supplied with pulses that synchronize the operation of the object of control and the signal analyzer.

The signal xi (t) through the first element And 4 is fed to the first adder 5 modulo two, where it is added modulo two with the signal from the output of the first bit of register 3: y (t) xi (t) © ®z , (t).

The signal zi (t) is recorded in register 3 at the previous clock cycle t-1 and is equal to the sum modulo two signals X2 (t-1) from the second information output and signal Z2 (t-1) received from the 2nd bit of register 3 :

Z, (t) X2 (t-l) 0Z2 (t-1). Z2 (t-1) signal,

in turn, it is formed by signals xs (1-2) and Z3 (t-2); Z2 (t-l) X3 (t-2) fgs {1-2), etc.

Expressing the value of the signals at the outputs of register 3 through the values of the signals arriving at information inputs 7, we get y (t) xi (t) © X2 () e ... ®x (t-m + l).

Thus, the sequence of signals y (t) is the sum modulo two sequences of output signals of the control object, shifted one relative to the other by one measure. Moreover, any distortion of the signals in one of the cycles of the output sequences of the object being monitored due to the entered shift operation will lead to a distortion of 0

g

0

five

five

0

sequences y (t) in at least one measure.

Modulo 2 adder 5 associated with register 2 forms the signature generator and divides the polynomial corresponding to the sequence y (t) into the polynomial P (t) corresponding to the register 2 and the set of outputs of the first adder 5 modulo two. After the end of the sequence y (t), register 2 is set to the state corresponding to the remainder signature of dividing y (t) by P (t). The resulting signature is compared with the reference. Distortions in some bits y (t) will lead to the fact that the resulting signature will differ from the reference one, which indicates a malfunction of the monitored object. In case of coincidence of the obtained and reference signatures, it is concluded that the monitored object is working.

Thus, the proposed signature analyzer allows for one test cycle of the monitored object to determine its failure, which consists in distortion of the output signals in one of the cycles of operation, which leads to a reduction in the time of detection of such distortions.

Claims (1)

Invention Formula The signature analyzer contains the first register, the group of elements AND, the group of adders modulo two and the shift register, the first inputs of the elements AND are the group of information inputs of the analyzer, the outputs of elements AND are connected to the first inputs of the corresponding modulators two connected to the corresponding outputs of the first register, the group of information inputs of which is the group of inputs of the analyzer mode setting, the output of the first modulo-two adder is connected to the information the input of the shift register, the group of inputs of the first modulo-two adder is connected to the group of outputs of the shift register, the synchronous input of the analyzer is connected to the synchronous input of the shift register, the group of outputs of which is a group of outputs of the analyzer, it contains a second register, with the second input of the i-ro modulo two modulator (, t, where m is the second register bit) connected to the output of the 1st bit of the second register, the j-ro output of the adder modulo two () is connected to c (j -1) -th input of the second register, the w-th input is connected to schine zero potential, second register write control input connected to the clock terminal of the analyzer.