SU1251181A1 - Buffer storage - Google Patents

Abstract

The invention relates to storage devices and can be used as a buffer storage device in systems for collecting, recording and processing multi-channel measurement information. The aim of the invention is to increase the reliability of the device as well as to expand the scope of its application by providing selective recording of data to the drive. The device comprises a memory unit, an address generation unit, a selection unit. The selection block contains one vibrator, the AND, OR, NOT, elements, the register, the permanent memory block. The address generation block contains a write address counter, a read address counter, a reversible volume counter, and-OR, NOT, OR, AND, and IPI-NOT elements. 1 hp ff, 3 ill. well sh

Description

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The invention relates to storage devices and can be used as a buffer storage device in systems for collecting, recording and processing multi-channel measurement information.

The purpose of the invention is to increase the reliability of the device and to expand its field of application by ensuring the selective recording of data in the collector.

Figure 1 shows the structural diagram of the proposed buffer storage device; figure 2 - structural diagram of the block selection address characteristics of information; Fig. 3 is a block diagram of a block for forming an address for accessing a memory block;

Buffer storage device contains a memory block i with information inputs 2 and 3 and information outputs 4, address generation block 5, control inputs 6 and 7, control output 8, selection block 9, and control input IO.

The feature selection unit 9 consists of a single vibrator 11, an AND 12 element of the Iimi 13 element, a register 14, a permanent memory block 5, an AND 16 element and a HE 17 element.

The address generation unit 5 is made up of the address counter 18 of the write address of the reading address counter 19, the reversible volume counter 20, the AND-OR 2 elements, the HE 22 element, the OR 23 element, the AND 24 element, and the OR NOT 25 element.

The device can most effectively be used in multichannel systems for collecting, recording and processing measurement information in which the data belonging to the corresponding channel is determined by the code of specially allocated word bits (information sign). It performs two operations: writing data to a memory block and reading data from a memory block, at times determined by the arrival of the corresponding synchronization signals. However, in recording mode, the algorithm of the device operation depends on the degree of filling with information in the memory block. When the memory block is empty or filled up to a predetermined limit (value), the current address of the entry in the block for generating the address to the memory block is modified after

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records of each information word entering the device. After filling the memory block to a certain value close to the maximum capacity of the memory block, the latter records only the most valuable information from the user's point of view, the allocation of which is made according to its attribute. In the device feature selection unit, a memory device is contained in which, by the addresses uniquely corresponding to the feature codes of the measurement channels 5, signs of allocation or non-allocation of these data channels are recorded for recording in the memory unit. Each time a channel arrives at the device input, the storage device is accessed at the address corresponding to the feature code, and if there is a selection feature in this storage device, the data of this channel is written into the memory block. This reduces the likelihood of an overflow in the buffer storage device.

Buffer storage device operates as follows.

Before starting operation, the initial installation of the device is carried out by the signal input 10. In this case, the counters 19, 18, and 20 of the address formation unit 5 are set to the zero state. The high signal level at the output of the element OR NOT 25, i.e. at the output B of the control unit, indicates that there is no read information in the buffer storage device.

With the arrival of the information parcel at the inputs 2, accompanied by a sign arriving at the inputs 3, and the sync signal at the device control input 7, data is recorded in the memory block at the address generated at the address outputs of the address generation unit 5. At the same time, the output bits of the block 5 are connected to the output bit signals of the write address counter 18 that are open for this purpose. Data is written to memory block 1 by a signal at input 7 of the device control. At the same time, this signal is fed to the input of the one-shot I1 of the block 9 of the selection of signs, Simultaneously

the rator I 1 forms on the falling edge of the incoming screen, the screens are short and mycc, which passes through the open element 12 and the element OR 13 at the output of block 9. This signal, connected to the second input of block 5, modifies the contents of the write address counter 18 (a unit is added) and a volume counter 20 (a unit is added) .. The subsequent information packets are recorded in the same way until the second signal level at the second memory output of the address to the memory block appears witness uyuschy that a memory block 1 contains the number information, which is close to its filling, in this case requests to write information into the buffer memory are performed as follows.

With the arrival of the information parcel at the inputs 2, accompanied by a sign received at the inputs 3, the sync signal at the control input 7, the data is written to the memory block 1 by the current write address generated at the address outputs of the block 5. Simultaneously with the rising edge of the signal At the control input 7, the address indication of the information is recorded in the register 14 of the selection unit 9. On the falling edge of the signal at the control input 7, the single-vibrator P generates a polling pulse, which is fed to one of the inputs of the element I 16. In block 15 of the permanent memory at the addresses, which uniquely correspond to the address characteristics of the channels carrying the most valuable user information, unit bits are written, all other addresses contain zero bits of information. A call is made to block 15 at the address corresponding to the address attribute of the information present at the information inputs 2 of the device, and if there is a single bit of information at this address of the output of the AND 16 element, and therefore, the output of the OR 13 element appears , which modifies the contents of the counter 18 address records and the counter 20 volume. Record of subsequent information loading into the buffer memory at high signal level at the second control output

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Neither the 5-foop block of the Q-address of the address to access the memory block is made similarly.

When a request is received for reading information, which can be done at any time under the condition of a low signal level at the output 8 of the control of the buffer storage device, reading is made from memory block I at the address that is stored on the address outputs of the address generation unit 5 for output information tire 4 device. At the same time, at the first input 6, the control unit of the device connects through the open for this purpose elements AND-I.TO 21 to the address outputs of block 5 output bits of the counter 19 of the reading address. After the end of the reading by the falling edge of the signal at the control input 6, the contents of the read address counter 19 (the unit is added) and the volume counter 20 are modified. (The unit is subtracted). The subsequent information messages from the buffer memory are read in the same way. For normal operation, the ycTpoficTBa requires that the signals on the first 6 and second 7 control inputs of the device are separated in time.

Claims (2)

Invention Formula 1, A buffer memory containing a memory block, the information inputs of the first and second groups and outputs of which are the corresponding inputs and outputs of the device, the address inputs of the memory block are connected to the corresponding outputs of the address generation block, the control inputs of the block for the output of address generation and the memory block are the corresponding inputs ycTpoficTBa, the first control output of the shaping unit with the address is a corresponding output of the device, characterized in that, in order to expand the field of application of the device by providing selective recording of data to the drive, it contains a feature selection unit whose group inputs are connected to the information inputs of the second storage unit group, the first and second the inputs of the feature selection unit are connected respectively to the control input of the memory unit and to the second control output of the address generation unit. I 2. The device according to claim 1, characterized in that the cejteK block of indications comprises a fixed memory block, a register, a one-shot, AND elements, an NOT element and an OR element, the output of which is an output of the attribute selection block, the first and second inputs element OR connected to the outputs, respectively, of the first and second elements AND, the first inputs of which are connected to the one-way output Pa, the one-shot input is the first control input of the feature selection unit and connected to the corresponding register input, the information inputs of which are the corresponding inputs of the selection unit, the register output connected to the inputs of the fixed memory unit whose output is connected to the second input of the second And element, the third input of which is the second control input and is connected to the input of the element, the output of which is connected to the second input of the first element I. fig t Editor A. Ogar tffueS Compiled by S. Shustenko Tehred I.GayDosh 4419/51 Circulation 543. Subscription VNIIPI USSR State Committee Inventions n discoveries 113035, Moscow, Zh-35, Raushsk nab. 4/5 Production and printing company, Uzhgorod, st. Project, 4 pufg Proofreader M. Demchik