SU1251125A1 - Integration device - Google Patents

Abstract

The invention relates to computing and information and measuring equipment. The purpose of the invention is to improve the accuracy of integration. The integration of input and reference signals, in contrast to the nanotype, is carried out by controlling the current generator through the first switch and the first input of the summing amplifier, to the second input of which the signal from the third feedback integrator is fed, leading to the integration error from the current generator current difference and the input current of the buffer amplifier . The initial value of the voltage on the integrating capacitor is established through a switch corresponding to the output signal of the second feedback integrator. The error from the bias voltage and the input current of the buffer amplifier is taken into account at the time the integration result is sampled by an analog storage unit, the output of which is amplified when the gain control amplifier with an adjustable gain of the output signal of the first feedback integrator is fed to the input, taking into account the total error conversion factor. The selection of the most advantageous integration range is performed by connecting the corresponding current generators, and the selection of the output signal scale is also controlled by the gain factor. The invention can be used in electronic systems for processing and analyzing signals, in particular, in integrating form-to-code converters. 1 W1. (Lu sd go sp

Description

The invention relates to computing and information measuring technique, in particular, is intended to be used in integrating converters of the syntax code.

The purpose of the invention is to increase the accuracy of integration.

The drawing shows a diagram of the integrating device.

The integrating device contains positive current generators 1-1 and negative

2, - 2 polarities, switches 3. - 3f. and 4, A. current, the control inputs of which are the integration resolution inputs of the device 5, -5, and

6, - 6

p integrating capacitor

7, one plate of which is connected to a constant voltage source 8, a buffer amplifier 9, the output of which is the analog information output of device 10, and the input is connected to another plate of an integrating capacitor 7 and through the corresponding switches 3, 3, and 4, - 4 „Current with positive current generator outputs

B

and negative 2, - 2 f, polarity, the first switch 11, the information inputs of which are connected respectively to the analog information input of the device 12 and the outputs of a group of sources 13, - 13 reference signals, a summing amplifier 14, the first input of which is connected to the output of the first switch 11 and the output is with the control inputs of the generators 1 (-1 and 2 (2 h of current, an amplifier with an adjustable gain 15, an analog memory block 16, the input of which is connected to the analog information output of the device 10, and the output with an input of L with adjustable transmission ratio 15, the output of which is the analog information output of reading device 17, comparison element 18, the first input of which is connected to the output of device 17, and the output is discrete information output of device 19, the first feedback integrator 20, whose output connected to the first control input of the smooth adjustment of the gain of the amplifier with an adjustable gain of 15, the second feedback integrator 21, the key 22, through which the output of the second integrator.

ten

 .

15

20

25

thirty

35

40

45

50

55

252

Feedback 21 is connected to the input of the buffer amplifier 9, the third feedback integrator 23 whose output is connected to the second input of summing amplifier 14, the inputs of all feedback integrators 20, 21 and 23 are connected to the discrete information output of the device 19, the fourth switch 24, the control inputs of which are the job inputs of the device 25, and the corresponding outputs are connected to integrator integration enable inputs 20,21 and 23 feedback, the second switch 26, the output of which is connected to the second input elements 18, comparison, and inputs to sources 27, -27 reference signals, a third switch 28, the output of which is connected to the control input of a discrete gain control amplifier with adjustable transfer ratio 15, and inputs to the outputs of a group of sources 29–29 to signals gain programming, the control inputs of all the switches 11,24, 26 and 28 are connected to the inputs of the device operation mode 25, the control input of the key 22, the address input of the analog memory block 16, the information input of the fourth switch 2 4 are, respectively, the input of the initial installation of the device 30, the input of sampling and storing the result of the integration 31 and the gate input of the device 32.

The device works as follows.

When applying to the inputs 25 of setting the device operation mode an appropriate combination of control signals, one of the device operation modes is realized. The integration of the input signal is made by connecting through the first switch I1 to the first input of the summing amplifier 14 of the information input of the device 12, through the third switch 28 of one of the sources 29, - 29 c. the adjustment signal of the selected gain, via the second switch 26 of one of the sources 27-27 of the reference signal corresponding to the zero value of the input signal. With a change in the signal at the output of summing amplifier 14, the difference in currents r

312

current nets of positive 1, - 1, and negative 2, 2 polarities. When removing the signal at the input 30 of the initial installation of the device and applying to the control inputs 5, - 5, and 6 (- 6 switches 3, - 3 and 4 | of the current, the enable signals of the integration, the difference of the currents of the current generators of positive and negative polarity The integrating capacitor 7 charges, the voltage difference on which before and after the integration corresponds to the integral value of the signal in the integration interval. E The instant of the termination of the integration resolution signal from the current generator through current switches from the integrator The capacitor switches to the common bus of the device, and the charge on the capacitor 7 is remembered. Since the output of the device 10 is used to serially connect the integrators during the conversion form-code by the sequential integration method, the buffer amplifier 9 must not only have a high input resistance but also provide undistorted transmission of the form of voltage variation on the integrating

capacitor 7. I

At the end of the enable signal

integration The sampling signal is fed to the sample input and the integration result 31 is stored. The output voltage of the buffer amplifier 9 is stored by the analog memory unit 16 at the end of the sampling signal. Thereafter, a signal of the initial installation of the device can be supplied to the input 30, through which the switch 22 goes to the open state, the integrating capacitor 7 is discharged to the level corresponding to the output voltage of the feedback integrator 21. At the end of the initial setup signal, the integration process can be repeated. At the output of the device 17, the voltage corresponds to the integral value of the signal with a certain scaling factor, which makes it possible to normalize the output signal.

Comparison element 18 samples the difference between the output and reference signals. If, as a comparison element 18, not a separate comparator is used, but analog

54

go-to-digital converter, the code corresponding to the integral value of the signal can be removed from the output 19 of the device.

When integrating a signal with a real device, the integrating capacitor 7 is also charged with the initial difference in the currents of the generators I - 11, and 2, 2 currents and the input current of the buffer amplifier 9,

At the time of the sampling signal, the integrated capacitor 7 also continues to be charged by the input current of the buffer amplifier 9. In this case, the instability of the conversion coefficient is determined primarily by the instability of the current generators 1 -1 and 2-2 (current of the capacitor of the integrating capacitor 7. For error compensation converters are used by integrators 20, 21 and 23 feedbacks, carrying out negative feedback by changing, respectively, the gain with an adjustable transfer coefficient 15, level n the initial value of the voltage of the integrating capacitor 7, the offset of the input signal level.

When selecting the initial value setting mode on the integrating capacitor 7, through the second switch 26, the reference signal corresponding to the zero value of the input signal is connected to the second input of the comparison unit 18.

In the absence of an integration resolution signal at the corresponding inputs 5, -6, the initial installation signal is removed at input 30 of the device and a sampling signal is applied to input 31, after which the voltage value corresponding to the initial voltage of the integrating voltage is stored in the analog memory block 16. the capacitor 7, taking into account the input current and the bias of the buffer amplifier 9, which is further compared in the comparison element 18 with the reference signal corresponding to the zero value of the input signal. In this case, the comparison result also takes into account the offset of the analog memory block 16 and the amplifier with an adjustable M transmission coefficient 15.

Upon completion of the sampling signal, taking into account the delay necessary to establish the comparison result, the output of the comparison element 18 sends a signal to the gate input device 32, which through the switch 24 enters the integration resolution input of only the second feedback integrator 21 in accordance with the combination of control signals input 25 sets the device operation mode. For a certain number of cycles of this mode at the output of the second integrator 21. A feedback is established, the voltage ensures the discharge of the integrating capacitor 7 to the initial value at which the zero result of the comparison is set at the output of the comparison element 18.

When selecting the mode for modifying the initial difference of the currents of the generators 1, -11 and 2 (-2 cents of the current and the current of the buffer amplifier 2, the reference signal source is connected through the first switch 1I; the signal is removed through the second switch 26 the reference signal source the initial installation of the device at input 30, the enable signal is supplied. The integration to inputs 5 (- .5 and 6., - 6 "9 after which the sample signal to input 31 of the device is supplied. At the time of the completion of the sampling signal in the analog block 16 pa These values are remembered by voltage 1 and on the integrating capacitor 7, which differs from the initial value by the value and the integral value of the current difference between the generators 5 - 1 and 2, 2 current and input current of the buffer amplifier 9, which is compared in comparison element 18 with the reference signal corresponding to At the end of the sampling signal, a signal is also delayed to the input 32 of the device, which in this case goes through the decoder to the input of the integration resolution of only the third integration ora 23 feedback.

For a certain number of cycles of this mode, the output of the third feedback integrator 23 establishes a voltage5 compensating for the difference in the currents of the generators

C - 1 and 2 | - 2jj current and input current buffer amplifier 9.

When selecting the total conversion factor correction mode, the first switch 1I connects the source 13 of the reference signal other than zero to the third switch 28 to the source of the control signal for the selected gain, and the second switch 26 to the source 27 of the reference signal corresponding to the reference signal with a given gain. Further, a sequence of actions is also performed, as when integrating the zero value of the reference signal, but the signal supplied to the input 32 of the device,

passes to the input of the integration resolution of only the first feedback integrator 20. The signal at the output of the reference element takes into account the difference between the overall conversion coefficient and the expected one. A predetermined number of cycles at the output of the first feedback integrator 20 establishes a signal that changes the gain of the amplifier with an adjustable gain of 15 and compensates for the instability of the overall conversion coefficient.

The described modes of operation of the device depending on the applied elec

The elements and the required accuracy can alternate with the input signal integration mode with different repetition rates.

Claims (1)

Invention Formula An integrating device containing two groups of current generators, respectively, of positive and negative polarities, the outputs of which are connected via one of the current switches to one of the plates of the integrating capacitor and to the input of a buffer amplifier, the output of which is an analog information output of the device, and a constant voltage source, the output of which is connected to another plate of the integrating capacitor, the control inputs of the current switches are corresponding, the inputs of the permit Integrating device, characterized in that. that, in order to improve the integration accuracy, it contains the first, second and third feedback integrators, first, second, third and fourth switches, a comparison element, a group of sources of reference signals, a group of sources of gain signal programming signals, variable gain amplifier, analog storage unit, switch and summing amplifier, the output of which is connected to the control inputs of all current generators, and the first and second inputs are connected respectively To the outputs of the first switch and the third feedback integrator, one of the information inputs of the first switch is the analog information input of the device, and the other information inputs of the first switch are connected to the outputs of the corresponding sources of reference signals of the group, the output of the second switch is connected to the first input the comparison element, and its information inputs are connected to the output of the corresponding sources of reference signals of the group, the control inputs of smooth and discrete adjustment amplifier gain controlled transmission coefficient respectively connected to the output of the first feedback integrator and to the output of the third switch, the information inputs of which are connected to the outputs of the corresponding signal sources of the gain group programming, the information input of the fourth switch is the gate input of the device, and its three outputs are connected to the integration resolution inputs of the first, second and third integrators zi, the output of the second integrator is connected via a key connected by a control input to the input of the initial setup of the device to the input of the buffer the silicon, the output of which is connected to the information input of the analog storage unit, the address input of the analog storage unit is the control input for selecting and storing the integration result of the device, and its output is connected to the information input of the amplifier with adjustable transmission coefficient, the output of which is antiscale information the readout output of the device and is connected to the second input of the reference element, the output of the comparison element is connected to the information inputs of the first, second and third integrations Hur feedback and is a discrete data output apparatus, the control inputs of the switches are combined and digital input specifying the operating mode of the device.