SU1247867A1 - Generator of random pulse arrival - Google Patents

Abstract

The invention relates to the field of computer technology and can be used in the simulation of noise and pulse interference in information transmission and processing systems. The aim of the invention is to increase the accuracy of the generator. The random pulse flow generator contains a clock pulse generator, a pulse shaper, an integrator, a function converter, a delay element, a key, a frequency divider, a counter, a NOT element, AND elements, a group of primary sources of pseudo-random signals. Compared with the prototype, the generator has the following advantages; The use of the delay element makes it possible to compensate for the delays in the circuit elements and to improve the accuracy of modeling a random process at the output of the simulator. The specified distribution of the output process is approximated at intervals of unequal magnitude with a systematic decrease in the probability of the process staying in these intervals, which improves the accuracy of the simulation of distribution tails. The generator easily controls the separate time and amplitude properties of the output process by programming the converter's ROM. The possibility of functioning of the analog nodes of the generator in the vicinity of the areas of limitation is eliminated, which also increases the stability of the characteristics reproduced by Nmitatoman of processes 1 Cp. f-ly, 3 ill. with S (L

Description

one

The invention relates to a computational technique and can be used in the simulation of communication noise in information transmission and processing systems.

The purpose of the invention is improving the accuracy of the generator.

Figure 1 shows the functional diagram of the generator; FIG. 2 is a functional diagram of a functionaldong converter; FIG. on fig.Z - timing diagrams illustrating the operation of the generator.

i

The generator contains a generator 1

clock pulses, driver 2 pulses, integrator 3, functional converter 4j delay element 5, key 6, divider 7. frequency, counter 8, element NOT 9, element 10 AND 115, and a group of primary sources 12 pseudo-random signals. The functional converter 4 comprises a memory block 13 and a digital-to-analog converter 14.

The generator works as follows.

Each pulse from the output of the element 11 sets into the counter 8 and with some delay resets the integrator 3. The output code of the counter 8 is transformed according to a given law in the converter 4 at the output of which a constant voltage is applied to the input of the integrator 3, which leads to an increase voltage at its output. The next pulse coming from frequency divider 7 changes the content of counter 8. The code (00 ... 1) formed at the output of counter 8 is transported by means of converter 4 to a constant voltage applied to the input of the integrator 3. At the time of the next With a Poisson pulse, the voltage buildup at the output of integrator 3 begins first in the manner described.

Thus, at the output of the integrator 3, a voltage of a complex shape is formed. The process at the output of the integrator 3 is gated using a key with 6 pulses from the output of element AND 10. The pulse flow at the output of element 10 is a Poisson stream of pulses and it is not compatible with the Poisson stream formed at the output of element I.

47867 - 2

It is obvious that, as in the known device, the statistics of the output voltage is determined by the form of the voltage rise at the output of the integrator 3 and the average pulse frequency at the output of the element AND 1 1. Pulse streams at the outputs of the And 10 and 11 elements are formed by a group of primary sources 12 pseudo-10 random signals.

The time intervals between the pulses at the generator output are specified by the time intervals at the output of the element AND 10. Consequently, the flow of pulses at the generator output is Poisson.

The amplitude distribution of the output pulses is given by the parameters of the converter 4 and the integrator 3 and can

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set, in particular, by the truth table of memory block 13.

Claims (2)

1. A random pulse flow generator containing a functional converter, an integrator, a key, a clock pulse generator, the output of which is connected to the first input of the first element AND and the clock inputs of the primary sources of pseudo-random signals of the group whose outputs are connected to the inputs from the second to the last accordingly, the first element And, characterized in that, in order to improve the accuracy of the generator., it contains a delay element, a pulse shaper, the second element And, the NOT element, a counter and a frequency divider whose output is connected to the counter input of the counter, whose information output is connected to the input functional converter, the output of which is connected with the information input of the integrator, whose output is connected to the information input of the switch, the output of which is the output of the random pulse flow generator, the output of the first element I is connected to the installation input of the counter and the input of the delay element, the output of which through the pulse shaper is connected to the input Reset of the integrator, the output of the clock generator is connected to the input of the frequency divider and the first input of the second element I, the output of which is connected key, the outputs of all but the last primary sources. pseudorandom signals of the group are connected to the inputs from the second to the penultimate, respectively, of the second element AND, the output of the last primary source of pseudo-random signals from the group is NOT connected to the last input of the second element I. 2478674 2. The generator according to claim 1, on. It is based on the fact that the functional converter contains serially connected memory block 5 and a digital-to-analog converter, the output of which is the output of a function converter, the input of which is the address input of the memory block. FIG. fie. 2 one F ppppppppppppppppppppppppppppppppp .CffpOC CVfm ffflfff.cve F ppppp -t ffflfff.cvem physical 3 Editor I. Segl Nick Compiled by A.Karasov Tehred M.Hodanich Order 4126/48 Circulation 671- Subscription VNIIPI of the USSR State Committee for Inventions and Discoveries 113035, Moscow, Zh-35, 4/5 Raushsk nab. Production and printing company, Uzhgorod, st. Project, 4 Corrector L; Patay