SU1241289A1 - Versions of analog storage - Google Patents

Abstract

The invention relates to computing, in particular, to memory devices, and can be used as a demodulator for amplitude-modulated signals. The purpose of the invention is to improve the accuracy and speed of the device. The device contains two amplifiers, two storage elements on capacitors, two passive elements, a control bus and a zero potential bus. The introduction of the second key and the third passive element made it possible to reduce the error in the transition from the storage mode to the sampling mode. 2 sec. f-ly 4 Il.

Description

The invention relates to computing, in particular, to storage devices, and can be used as a demodulator for amplitude modulated signals.

The aim of the invention is to improve the accuracy and speed of the device.

FIG. 1 and 2 show two variants of the functional implementation of the proposed device; in fig. 3 and 4 are timing diagrams explaining the operation of the proposed device.

The proposed device (Figures 1 and 2) contains amplifiers 1 and 2, keys 3 and 4, passive elements on resistors 5 and 6, storage cells on capacitors 7 and 8, control bus 9, and zero potential bus 10. In addition, the proposed device shown in figure 2 contains a passive element on the resistor 11,

The proposed device works as follows.

The operation of the device in the first embodiment (Fig. 1) is similar to its work in the second embodiment (Fig. 2). In the sample mode, the keys 3 and 4 are closed and the device functions as an amplifier with a negative feedback. In the storage mode, the keys 3 and 4 are open and the voltage on the capacitor 8 u at the output of the amplifier 1 U is kept at –715 with equal voltage at the moment preceding the storage mode. The voltage on the capacitor 8 is amplified by the amplifier 2 and is the output

voltage UBWX device. I

The time diagram (Fig. 3) shows by dotted lines the transitions of the output voltage of amplifier 1 (in the prototype from zero value in storage mode to voltage at the moment of sampling and then again to zero value). The dynamic error of the voltage transient U (in Fig. 4 is shown by a continuous line) from its value in storage mode (point A in Fig. 4) to the set value U | in the sampling mode (BC line), which is amplified by the output amplifier 2, and causes a device error in the transition from the storage mode to the sampling mode.

The maximum during the sampling time the dynamic error is equal to

;

ten

15

20

25

thirty

AO

45

itO

55

jump an. In the prototype, the maximum transient error during the sampling time (in Fig. 4 is shown by a dashed line) is equal to А в, and А.

To increase the input impedance of the output force of the bodies, necessary for high-quality signal storage, it can be applied

715

0 MOSFET with any, even biased, characteristic, for example, an MOSFET with an induced channel. This only leads to a shift in the range of U values for samples (Fig. 4),

15 however, the accuracy of the device is not reduced. In the prototype, the use of an extra amplifier with an offset characteristic leads to an increase in the error.

20 storage to sampling mode.

The operability of the proposed device is fully preserved when switched on in series with the capacitor 25 of the resistor 11.

 Thus, the proposed device, in comparison with the prototype, which is taken for the base object, has greater accuracy due to the reduced The error during the transition from re-. storage press to sample mode.

thirty

Claims (2)

1. An analog storage device containing the first storage element on the first capacitor connected to the negative feedback circuit of the first amplifier, the output of which is connected to the information input of the first key, the second storage element on the second capacitor, one of the plates of which is connected to the code of the first the key and the input of the second amplifier, another volume, as the second capacitor is connected to the zero potential bus, the output of the SECOND amplifier is the output of the device and is connected to the first output the first passive element on the first resistor, the second output of which is connected to the first output of the second passive element on the second resistor, the second of which is the input of the device, controlled to the 11 1st input of the first key is the control input of the device, characterized in that .In order to improve the accuracy of the device The second key, whose information input is connected to the first output of the second resistor, the control input of the second switch is connected to the control bus, and the output of the second switch is connected to the input of the first amplifier. 2. An analog storage device containing the first storage element on the first capacitor, one of the plates of which is connected to the output of the first amplifier and to the information input of the first key, the control input of the first key and the control bus, output the first switch is connected to the input of the second amplifier, the output of which is the output of the device and is connected to the first output of the first passive element on the first resistor, the second 89 .4 the output of the first resistor is connected to the information input of the second switch and the first output of the second passive element on the second resistor, the second output of which is the device input, the output of the second switch is connected to the input of the first amplifier, the second storage element on the second capacitor, one of the plates of which a zero potential bus, the other side of the second capacitor is connected to the input of the second amplifier, which is different in that, in order to improve the accuracy of the device, a third passive element is inserted into it NT on the third resistor, the first output of which is connected to another plate of the first capacitor, the second output of the third resistor is connected to the input of the first amplifier. Phie, 1 ; i7 FIG 2 Moment of sampling FIG. Wake up FIG.