SU1246139A1 - Analog storage - Google Patents

Abstract

The invention relates to computing, in particular, to memory devices, and can be used to create analog-to-digital converters and communication devices with an object. The purpose of the invention is to increase speed and expand the field of application of the device by increasing the dynamic range-by introducing a block of comparators, a source of reference voltages, switches, voltage dividers, a switch, a second key, and a second integrating amplifier. The introduction of new units and elements made it possible to double the proposed device. speed and more than 20 dB to expand the dynamic range. 1 il. o (o (l

Description

The image relates to computing, in particular, to storage devices, and can be used to create analog-to-digital converters and communication devices with an object.

The aim of the invention is to increase the speed of the device and expand its range of application by increasing the dynamic range.

The drawing shows the functional diagram of the device,

-. The device contains a differential amplifier, keys 2 and 3, a comparators unit, a control unit 5,. reference voltage source 6, voltage dividers 7-9, integrating amplifiers 10 and P, switch 12 switches 13 and 14, parts: on a resistor 15, control bus 16 and zero potential 17

The device works as follows.

When a signal is applied to the analog input, the input from the input to the block is 4 comparators, which compares the input voltage to the reference voltage. I1 and from the outputs of the source 6 of the reference voltages, the result of the comparison in the form of a digital code is fed to the inputs of the control unit 5, a corridor processes this information and gives the corresponding values of the output code; which goes to the CYLARY output (output 1 of the device and controls the switches 13 and 4 ° B depending on the state of the control signal on bus 16) a divider 8 or 9 is connected to the inputs of the switch 14, thus setting the necessary transmission coefficient of the device ( Kn), the value of which depends on the input signal voltage, i.e., automatic scaling is carried out. Information on the magnitude of the set value of Kn is available at the output of the device (output 1). To reduce the disturbances caused by the fall, amplified and through the OOS loop at Kp 15 and also to reduce the influence of the parasitic switching charge due to the penetration of the control signal through the parasitic capacitance of the current switches 2 and 3 to the inputs of the integrating amplifiers (i.e.

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five

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integrators-} 10 and 11, the transfer coefficient of differential amplifier 1 is set to approximately B Kp times using switch 13. Thus, the voltage at the output of differential amplifier I is approximately Kp times the input, and therefore, the effect of the parasitic one decreases commutation charge and other errors caused by a decrease in the gain along the OOS loop with an increase in Kn. Depending on the state of the control signal on bus 16, keys 2 or 3 connect the output of the first integrating amplifier 10 (sampling) or the second integrating amplifier 11 to store J, and switch 12 connects the outputs of the first integrating amplifier 10 (sampling mode) or a second of it of the amplifying amplifier 1 (storage mode) to the analog output (output 2 / device, the Sample and Storage designations are purely conditional, i.e., when one of the storage channels samples, the output of the other channel is read and Information 5 and vice versa. Thanks to this circuit design solution, a significant increase in speed in a cyclic mode is ensured. When the first storage channel, consisting of the first current switch 2 and the first integrating amplifier 3j, is assembled, then the information stored in the second channel is read consisting of the second current switch 3 and the second integrating amplifier 1 1 p and vice versa.

The proposed device in comparison with the known one has a significant (n; 1 20 dB and more expansion of the dynamic range while maintaining high accuracy due to automatic scaling of the input signal, as well as a significant 2-fold) increase in fast operation in cyclic mode, the possibility of realizing the device on the available element base for the integrated technology, the relative simplicity of the device with high quality BCHi-JbJx indicators,

Claims (1)

Invention Formula An 1log storage device containing a differential usi3 A relay whose output is connected to the information input of the first switch, the first integrating amplifier, the control input of the first switch is connected to the first input of the control unit, a passive element on the resistor, the first input of the control unit is connected to the control bus, and a zero potential bus, characterized in that In order to increase the speed of the device and expand its application area by increasing the dynamic range, a comparators block, switches, voltage dividers, the switch, the second switch and the second integrated amplifier, whose input is connected to the output of the second switch, the information input of the second switch is connected to the output of the differential amplifier and to the first input of the resistor, the second output of which is connected to the first input of the differential amplifier and to the controller; The input of the first switch is connected to the second output of the control unit, the third output of which is connected to the control input of the second 5 Oh, 15 20 25 394 key, the information inputs of the first switch are connected to the first voltage divider, the input of which is connected to the zero potential bus, the information input of the comparators unit is the device input and connected to the first inputs of the second and third voltage dividers, the second inputs of which are connected respectively to the outputs of the first and the second integrating amplifiers, the outputs of the voltage dividers are connected to the information inputs of the second switch, the control input of which is connected to the fourth output of the block controlling the second switch output is connected to the second input of the differential amplifier, the outputs of the integrating amplifier are connected to the data inputs of the switch control input coupled to a fifth input of Bloch. A control, the information inputs of which are connected to the outputs of the comparators block, the control inputs of the comparators block are connected to the outputs. the reference voltage source, the sixth output of the control unit is the first output of the device, the output of the switch is the second output of the device. -" about- Lii / 2i /: b