SU1236454A1 - Information input device - Google Patents

Abstract

The invention relates to automation and computing and can be used for keyboard input. The purpose of the invention is to increase the speed of the device and reduce the number of lines of communication is achieved by introducing into the device a synchronizer, inverters, triggers, drivers, element OR, the third counter, the element CHI-NOT. with their connections by providing information input circuitry without releasing the keys already pressed. 2 Il. "(L with 1C 00 05 4 SL

Description

The invention relates to automation and computer technology and can be used in keypads for entering information into various data processing systems controlled by a microprocessor.

The purpose of the invention is to increase the speed of the device and reduce the number of communication lines.

FIG. t is a block diagram of the device; Fig 2 is the time diagram of its operation (where a is the code transmission is absent; b is the code transmission; c is the resetting of the first counter 4).

The device contains a decoder 1 "matrix 2 switching elements, switch 3, first counter 4, synchronizer 5, outputs 6 and 7 of the synchronizer, first inverter 8, 9 and second 10 triggers, element OR 11, first driver 12, generator 13, control device input 14 on line 15, third counter 16, second driver 17, second inverter 18, third inverter 19, OR-NOT 20 element, second counter 21, information outputs 22, third trigger 23, fourth trigger 24, the fourth inverter 26, gating output 25.

The device works as follows.

If there is a low level of the fia signal at input 14 of the device, the third counter 16 counts the pulses from the output of the generator 13. The signal from the output of the third discharge of the third counter 16 through the inverter 18 and the driver is fed to the input of the second counter 21 and through the link 15 to the input of the first counter 4 The counters are switched on the leading edge of the signal on the communication line 15. The length {U1nosti high level of pulses on line 15 in the absence of transmission of information from the keyboard is 4T. Decoder 1 provides scanning of rows of matrix 2, and switch 3 - polling the columns of the matrix. The signal from the output of the switch 3 is fed to the data input of the first trigger.

On the leading edge of the signal on link 15, the synchronizer 5, at a time interval of 2T, produces at output 6 a signal stating the first trigger 9. When a closed switching element is detected at the input

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The data of the first trigger 9 is a high uroin signal and the output from synchronizer 5, 6, this trigger is raised at a time interval of 2 T after the leading edge of the signal on link 15. In this case, the signal on link 15 acquires a low level value as a result of the appearance of a high level signal at the output of the first trigger 9, the input and output of the OR element 11, and a low level signal at the output of the first driver 12,

At a time interval slightly exceeding 4T after the leading edge of the signal on link 15, the synchronizer 5 generates a low level signal at output 7, with which the first trigger 9 (and the second trigger 10) are reset. Thus, if the established value of the first counter 4 corresponds to a closed switching element, the duration of the high level of the corresponding impulse on the communication line becomes 2T.

If the first counter 4 is set to the zero state by the next pulse from the communication line 15, the output of the inverter 8, whose input is connected to the high bit output of the first counter 4, transitions the signal value from low to high and cokes the second trigger 10, after Which is what a high level signal appears at the input and output of an IPI element; 11, and a low level signal at the output of the first shaper 12 and at the communication line 15. Thus, if the steady state of the first counter is zero, the duration of the high level of the corresponding pulse on the link 15 becomes much less than t and is determined by the signal propagation time in the elements

devices.

If the first trigger 9 is not set. I.PI is the second trigger 10, the signal on the communication line has the same level as the signal at the output of the third bit of the third counter 16. In this case, one of the outputs of the ORID 20 element has a high signal level, and the output is a low level signal. If the first flip-flop 9 or the second flip-flop 10 are cocked after the third bit of the third high-level signal 16 is set to output, the signal on line 15

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the connection takes on a low level value and on both inputs of the OR-NOT 20 element there appear low-level signals, and on its output, a high-level signal. After time T after the appearance of the third discharge of the third counter 16 of the high three-digit signal at the output of the second discharge of this counter, there is a low level signal, and the installation input of the fourth trigger 23 has a high level signal and this trigger is gated with a signal from the output of the first specified counter . Similarly, after a period of time, the fourth trigger 24 is gated. The presence during the gating of the third trigger on its input data of the high level signal indicates a steady zero value of the bits of the first counter 4. The presence of a high level signal on the data input of the fourth trigger 24 during its gating indicates that the steady-state value of the first counter 4 corresponds to a closed switching element. When cocking the third trigger 23 with a signal from his right shoulder

the second counter 21 is reset, and, further, the codes are transmitted; the corresponding difference of the low level signal from its inverse arm at the installation input to the unit of the fourth trigger 24 causes the high level signal to appear at its forward output, and the third counter 16 at the input of the parallel recording a low level signal appears and this counter goes into parallel recording mode. In this case, a low level signal appears at the output of the third discharge of the specified counter, and consequently, on the communication line 15, a high level signal appears at the output of the second discharge, which causes the reset of the third trigger 23, the fourth trigger 24 remains in the cocked state nii. When the fourth trigger 24 is injected, a strobe signal is generated at the output 25 of the device, which is simultaneously a request signal for interrupting the microprocessor. After processing 1 by the microprocessor interrupt from the information input device, the microprocessor sets a high level signal at the device control input 14, and the third counter 16 is reset, at the output of its third

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A low level signal appears, which resets the fourth trigger 24 and interrupts the interrupt request signal at the output 25 of the device. Then, the microprocessor reestablishes the input of the device 14 to a low level signal, allowing further counting of the third counter 16, after which further interrogation of the matrix 2 occurs. When a closed switching element is detected1, and, as described above, the fourth trigger 24 is raised and the request again appears Preloading of the microprocessor, which is processed in the same way as described.

Thus, the synchronous operation of the first 4 and second 21 counters is ensured by resetting the second counter 21, caused by the cocking of the third trigger 23, which in turn occurs upon resetting the first counter 4,

The code corresponding to the zero state of the first counter 4 (and the second counter 21) and the matrix of switching elements separating the polling cycles is transmitted once per cycle of polling matrix 2. Besides

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The detected signals of the closed commutation elements are found. The receiver processes the incoming information from the input device. Codes matching

alphanumeric keys, are perceived once, if in the previous interrogation cycle of the matrix of switching elements these codes are missing, and then ignored, the codes from

register keys, and

other control keys are continuously accounted for. Ensuring that the information is entered without releasing the keys already pressed provides an increase in the speed of the device.

Claims (1)

Invention Formula A device for inputting information containing a generator, a matrix of switching elements, first and second counters, a switch and a de-diffuser, the outputs of which are connected to the information inputs of the switch through the matrix of switching elements, the address inputs of which are combined with the corresponding inputs of the decoder and connected to the outputs of the first counter, outputs The second counter is information outputs of the device, characterized in that, in order to increase the efficiency and reduce the number of communication lines, a synchronizer, inverters, triggers, drivers, the OR element, the third counter, the RIffil-HE element, and the first the synchronizer output is connected to the synchronization input of the first trigger, the second output to the reset inputs of the first and second triggers, one output of the first counter through the first inverter is connected to the synchronization input of the second trigger, the output of the switch is connected to An ode of the first trigger, the output of which is connected to the first input of the OR element, whose second input is connected to the output of the second trigger, and the output through the first driver to the counting input of the first counter, to the synchronizer input, to the first input of the OR-NOT element to the counting input of the second counter, the output of the generator is connected to the counting input The third counter, the first output of which is connected via the second inverter to the second input of the element OR– and to the input of the second generator, the output of which is connected to the second input of the second counter, the output of the element is connected to the data inputs of the third and fourth triggers, the second output of the third counter is connected to the input reset the fourth trigger and through the third inverter is connected to the reset input of the third trigger, the third output of the third counter is connected to the sync third and about the fourth trigger, the output of the third trigger is connected The one to the reset input -EiPoporo counter) the output of the fourth trigger through the fourth inverter is connected to the control input of the third counter and is the gate output of the device, the reset input of the third counter is the control input of the device, inverting look for the output of the third trigger connected to the installation input in 1st of fourth trigger. LM, “1THI1 G5 J ± fc-i: .n.