SU1203544A1 - Device for executing arithmetic commutative operations - Google Patents

Description

The invention relates to computing technology and can be used in analog computing systems, machines and devices, as well as in control and regulation devices for various purposes.

The aim of the invention is to expand the functionality of the device by providing continuous control of the operations performed.

The drawing shows a diagram of the proposed device for the case when the number of information inputs is three.

The device contains the first group of universal functional converters 1, a group of two-input adders 2. the second group of universal functional converters 3, a multi-input adder 4, an additional universal functional converter 5, an additional two-input adder 6, a universal functional converter 7 and an inverter 8, connected according to the above diagram.

Consider the operation of the device on the example of setting universal functional transducers 1 and 5 to play hyperlogarithmic, and transducers 3 and 7 hyperexponential functions.

The information inputs 9-11 (X, y and 2) of the device receive signals over which it is necessary to perform a commutative generalized operation, for example, to sum them up or multiply. The value of the step of a commutative generalized operation is given by the input 12 of the task for the operation being performed (ot), and addition, i.e. the first step corresponds to the zero value of the signal at input 12, and multiplication, that is, the second stage, corresponds to the single value of the signal. Stage oi +1 corresponds to the value of the signal ot. Input signals can be considered positive. The operation step may be 2 or lower, including negative values. If the stage is higher than 2, then the input signals must satisfy additional conditions that limit them from below. So, at stage 3, the input signals must be not less than a single positive value.

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neither With a step equal to 4, the signals must be at least e 2.71828, etc. At a step below 2, the input signals can take on negative values, and at a step of 1 and below, there are no restrictions on the input signals. A functional transducer for reproducing hyper-logarithmic dependence transforms the signal, giving the output a signal equal to the hyperlog of the signal at the input. The hyperlog function can be defined by the functional equation giplnx gipln (ln x) + 1, (1)

where gipln X is the designation for the hyperlog function,

1n - natural logarithm. In the class of analytic functions, the hyperlogarithmic function is uniquely defined. When implementing hyperlogarithmic functional converters, you can use the spline function method, specifying the function-only on the interval O, 11 and outside this interval, determine the value of the function from the functional equation (1) by pre-logarithmizing or exponentiating the argument the necessary number of times to bring it to the interval O, lj. On the interval Go, L, the hyperlogarithmic function can be specified as a polynomial with any desired degree of accuracy. So, when using the degree of the polynomial p 10 on the interval O, lj, the hyperlogarithmic function can be calculated by the formula

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giplnx 0,9161324502954-x + 0.2488641006781 + X2 + (- 0.1118364223775) -HE- 0,0931585984031h + 0.0139505408541-x + x + 05,0368895758333- - -0.0001945930294 X - -0.0176724455840 + 0.00818690133b 23 x - -0.0011615096029's.

This expression is obtained from the condition of the Continuity of the function and its derivatives, up to ninth order at the gluing points of the spline function.

Hyper exponential converters 3 and 7 perform the inverse transformation of blocks 1 and 5.

If the signal at the device input 12 is zero, then the adders 2 and the additional adder 6 perform the same conversion, and therefore the signals at the corresponding inputs of the adder 4 are equal to the corresponding signals at the device inputs 9-11, and the signal at the output 13 of the device is equal to the signal at the output of the adder 4 and therefore equal to the sum of the input signals. In this case, the hyperlogarithmic transformations in converters 1 and 5 are neutralized by hyperexponential transformations in converters 3 and 7, respectively. The device as a whole works in adder mode.

If signal 06 at input 12 is equal to a single value, then after hyperlogging of the input signals in converters 1, the signals from their outputs are reduced by one in adders 2, after which they are overexposed in converters 3. From the functional equation (1) it can be seen that In this case, all the chains of converters 1 and 3 and adders 2 as a whole perform logarithmic operations of the input signals. At the same time, the sum of the logarithms of the input signals of the device is obtained at the output of the adder 4, and the product of the input signals is obtained at the output of the device, since the chain of transducers 5 and 7 and the adder 6 performs the inverse operation of the logarithm (formula (1) at).

I If the signal oi at input 12 is 2, then the strings of converters 1 and 3 and adders 2 as a whole perform a double-logarithm operation, and the strings of converters 5 and 7

and adder 6 gives a double exponentiation operation. As a result, the device as a whole performs the exponentiation operation. If x and y are signals at two inputs, and z is a signal at the output of the device, then

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Z x

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At fractional values of the signal about the input 12, the device performs the corresponding intermediate commutative operations. So, with the value of the signal from 0.5, the operation-, chi, average between the word expansion and multiplication is performed. The use of such operations (non-integer stages), expands the possibilities of analyzing the stagnation of physical processes, allows a wider class of functions to be used in control and regulation systems and continuously controls the structure of regulators and other similar devices. Thus, the use of a series connection of elements or blocks with specified transfer functions in the control channels, the resulting transfer function is obtained as a product of the transmission operator coefficients links, and the parallel connection of channels gives the addition of the transfer functions of individual channels. Thus, the operations intermediate between multiplication and addition correspond to structures intermediate between sequential and parallel connections, and the transition from one structure to another can be carried out continuously.

Compiled by A. Maslov- Editor O. Yurkovetska TehredOl-MMKem

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 ABOUT

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Branch ShSh Patent, Uzhgorod, Proektna St., 4

Proof-reader I.Erdeyi

Claims (1)

DEVICE FOR PERFORMING ARITHMETIC COMMUTATIVE OPERATIONS, containing the first group of universal functional converters, the inputs of which are the corresponding information inputs of the device, a multi-input adder and a universal functional converter, the output of which is the output of the device, characterized in that, in order to expand the functionality by providing continuous control of operations, it contains the second group of universal functional transformations a combination of dual input adders, an inverter, an additional universal functional converter and an additional two-input adder, the inputs and output of which are connected respectively to the output of an additional universal functional converter, an input for specifying the type of operation of the device and the input of a universal functional converter, one input of a group of two-input adders is connected to outputs corresponding universal functional converters of the first group, their other s inputs are combined and connected through an inverter to an input device executed job type operation, and outputs through the corresponding universal functional transducers of the second group are connected to respective inputs of multi-input adder, the output connected to the input of the additional functional universal converter. eleven