SU1182696A1 - Majority-redundant device - Google Patents

Abstract

MAJOR-RESERVED DEVICE containing information storage devices, synchronization input and parallel recording enable input, each of which is connected to the clock input and device overwrite permission input, buffer registers, the outputs of which are connected to the parallel recording inputs of information storage devices. Majority element, the output of which is connected to information moves of the buffer registers, characterized in that, in order to increase noise immunity, a pulse distributor and three multiplexers, the informational inputs of which are connected to the outputs of information storage devices, are connected to it, the control inputs are connected to the input bus control overwrite, and the outputs - with the inputs of the major element, the control inputs of the pulse distributor are connected to the input i bus by the overwrite control, the synseral input - with the synchronization input units, and outputs - with separate synchronization inputs of the bits of the buffer registers.

Description

The invention relates to digital technology and can be used in devices of discrete automation and computer technology of increased reliability. The purpose of the invention is to improve the stability of the majority-redundant device. The drawing shows a functional diagram of the proposed major-redundant device. The majority-redundant device contains a clock input 1, an overwrite resolution input 2, I write 3 overwrite controls, a synchronization input 4, a 5-pulse distributor, buffer registers, information accumulators 7, multiplexers 8 | - S v-major element 9. The device operates as follows zom. After the passage of the next clock pulse to input 1, the next .kodevo word is formed in accumulator7. After that, the input 4 starts to receive pulses of a higher repetition frequency than that of input 1, and the value of the number set on the control bus of the recording with a t-bit parallel code after each pulse, input 4, is increased by one, pass value from zero to n (n is the number of bits of information accumulators without one; m is £ 2n). The changing number on bus 3, controlled by multiplexers 8–83, causes alternate connection of the inputs of element 9 to all bits of drives 7, –7 from zero to. At the same time, the distributor 5 alternately supplies sync pulses to the bits of the registers 63 corresponding to the bits of the accumulators 7e, to which the element 9 is connected through multiplexers 8-8j to this bit. After the number on bus 3 reaches -to the value of n, all bits of the accumulators 74-7 are polled by multiplexers in registers 6, 63 84-8, the recovered code word is formed. At the conclusion of the rewriting procedure, an impulse is fed to input 2, which is used to write parallel code from registers 6-6 to drives 7 | -7з. Output information in the device can be removed from the drive, from drives 7 - 7d, or from registers 6, - 6

Claims (1)

MAJORIZED-RESERVED DEVICE containing information storage devices, a synchronization input and a parallel recording enable input of each of which are connected respectively to a clock input and a device overwrite enable input, buffer registers, the outputs of which are connected to the parallel recording inputs of information storage devices, and a majority element, the output of which is connected with information inputs of buffer registers, characterized in that, in order to increase noise immunity, a pulse distributor and three an multiplexer, the information inputs of which are connected to the outputs of the information storage devices, the control inputs are connected to the input bus of the rewrite control, and the outputs are connected to the inputs of the majority element, the control inputs of the pulse distributor are connected to the input bus of the rewrite control, the sync input is connected to the synchronization input of the device, and outputs - with separate synchronization inputs. bits of buffer registers. th ·· *. QO Yu Stock 1182696 2