SU1172055A1 - Device for automatic determining of error coefficient in communication channel - Google Patents

Abstract

A DEVICE FOR AUTOMATIC DETERMINATION OF AN ERROR IN THE COMMUNICATION CHANNELS COEFFICIENT, containing sequentially connected phasing unit, a reference sequence sensor and a comparator, whose input is connected to the input of the phasing unit, and the output is connected to the input of the n-bit error counter, the interval counter, which input is connected to the phasing unit, and the output is connected to the input of the ph-error counter, the counter of intervals, which input is connected to the phasing unit, and the output is connected to the input of the phased error counter, the counter of the phasing unit, and the output is connected to the input of the phasing unit. It is an input of clock pulses, and a delay element that differs with. In order to expand the functionality of the device, the rewrite register, multiplexer, decryption are entered into it. ator, driver control signals, a further delay element. a distributor, reed relays and a micro calculator; the installation inputs of each of the n bits of the error counter are connected via a delay element to the first output of the control signal generator, the input of which is connected to the output of the interval counter, the outputs of each of the n bits of the error counter are connected to the corresponding the inputs of the rewriting register, the setting inputs of each of the bits, which are connected to the first output of the driver of control signals, and the outputs of each of the bits of the register of the write / write register to the corresponding (L information inputs of the multiplexer, the address inputs of each of the bits of which, except the last, are connected to the corresponding outputs of the control signal generator directly, and the address output of the last bit of the multiplexer is connected to the first output of the form-switch1 For control signals through an additional delay element, the outputs of the multiplexer are connected to the corresponding inputs of the decoder, the outputs of the multiplexer, as well as the outputs of the distributor and one of the outputs The control cords are connected to the corresponding reed relays, which are connected to the corresponding inputs of the micro calculator.

Description

one .

The invention relates to transducer discrete information and can be used in assessing the quality of these channels.

The aim of the invention is to expand the functionality of the device, which consists in improving the accuracy of determining the error rate, increasing the possible speed of operation and the possibility of a certain current number of errors during a measurement session.

The figure shows the structural electrical circuit of the device for the automatic determination of the error rate in communication channels.

The device contains a phasing unit 1, a reference sequence sensor 2, a comparator 3, an 4 error n-bit counter, a rewriting register 5, a multiplexer 6, a decoder 7, a counter of 8 intervals, a delay element 9, a driver 10 of control signals, an additional element 11 delays, distributor 12, reed relays 13, microcalculator 14.

The device works in the following way. .

The sequence of elements, containing errors and appearing at the output of the discrete channel, is compared by the comparator 3. with the reference sequence of the same structure formed by the sensor 2. The latter is controlled by the cycle phasing unit 1. At the output of the comparator 3, a sequence of errors is formed, which, at the beginning of the measurement, is fed to the input of the n-bit counter of 4 errors. The latter operates in a binary-decimal code, contains four serially connected decades, so the maximum capacity of the counter is ten thousand hours.

During the measurement, the 4 error counter is periodically polled using a control circuit consisting of a counter of 8 intervals, a driver 10 of the control signals and delay elements 9 and 11, its contents are written to the overwrite register 5, and the counter of 4 errors is reset to zero . In the rewrite register 5, the contents of the error counter 4 are memorized, and then sequentially entered through multiplexer 6, the decoder 7,

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reed relays 13 in a micro calculator 14, where it is displayed on a digital display of a micro calculator.

For the operation of the control circuit, from the beginning of the measurement, sync pulses (c) J counter 8 intervals divide the frequency of the sync pulses 10 thousand times and send a signal to the control signal generator 10 (FUS), which generates five control signals . The control signal from the first output FUS 10 is directly supplied to the installation

entries of rewriting register 5, thanks to which the contents of all four decades of error counter 4 are overwritten in rewriting register 5. Then with some delay in time T,

being determined by delay element 9, the signal from the first output of the FUS 10 resets the 4 error counter to the zero state. The same signal with a time delay f. 7 / T,

provided additional

delay element 11, is fed to the address input of the multiplexer b and gives permission to read from the register 5 overwrites in the decoder 7 the contents of the senior decade counter 4 errors. Using the decoder 7, a four-bit binary-decimal number is converted into a decimal

number system. Due to this, a signal corresponding to the entered decimal digit appears at the output of the decoder 7, one of the ten reed relays 13 is triggered, its contacts are closed, which simulate pressing one of the keys, and a ten digit is entered in the B microcalculator 14, which is displayed digital board microcapsule torus 14.

Using the control signals of the imaging unit 10, taken from the second, third and fourth outputs, the remaining three bits of the four-digit decimal number, reflecting the accumulated number of errors in the time interval, determined by the counter 8 intervals, are entered into the microcalculator 14 in the same way.

Systematically, after entering the accumulated number of errors using the control signal from the driver 10, taken from its fifth output

Claims (1)

DEVICE FOR AUTOMATICALLY DETERMINING THE ERROR COEFFICIENT IN COMMUNICATION CHANNELS, containing a phasing unit, a reference sequence sensor and a comparator, the other input of which is connected to the input of the phasing unit, and the output is connected to the input of the η-bit error counter, the input of which is an input of the sync input , and a delay element, characterized in that, in order to expand the functionality of the device, a rewrite register, a multiplexer, a decoder, forms are introduced into it control signal equalizer, additional delay element, distributor, reed relay and microcalculator, while the installation inputs of each of the η bits of the error counter are connected through the delay element to the first output of the control signal generator, the input of which is connected to the output of the interval counter, the outputs of η bits of the counter of each of the errors connected to the corresponding inputs of the rewrite register, the installation inputs of each of the bits, which are connected to the first output of the shaper control signals, and the outputs of each of the bits of the overwrite register are connected to the corresponding information inputs of the multiplexer, the address inputs of each of the bits of which, except the last, are connected to the corresponding outputs of the driver of the control signals directly. However, the address output of the pos, the ice discharge of the multiplexer is connected to the first output of the driver of the control signals through an additional delay element, the outputs of the multiplexer are connected to the corresponding inputs of the decoder, the outputs of which are also the outputs of the distributor and one of the outputs of the driver of the control sines is connected to the corresponding reed relays, which are connected to the corresponding inputs of the calculator.