SU1149238A1 - Information input device - Google Patents

Abstract

A DEVICE FOR ENTERING INFORMATION, containing a keyboard, driver, first, second and third registers, memory unit, first and second comparison blocks, display unit, adder, delay element, inverter, counter, first, second and third elements AND, first and the second element OR, the first and second switches, the first keyboard output is connected to the input of the first register, the output of which is connected to the information inputs of the RAM and the first switch to the first inputs of the first and second comparison and block units and The output of the imaging unit is connected to the first inputs of the first and second elements AND, and to the control input of the main memory unit, the output of which is connected to the second input of the first comparison unit, the first input of the first element OR, through an inverter connected to the second input of the first element AND, whose output connected to the second input of the display unit and to the counting input of the counter, the output of which is connected to the second input of the second element I, the output of which is connected to the third input of the display unit and the second input of the first IL element And the output of which is connected to the first input of the imager, to the control input of the counter, to the control input of the first switch and through the delay element to the first input of the third element I, the second input of which is connected to the output of the second comparison unit, the second input of which is connected to the output the third register, the output of the third element AND is connected to the fourth input of the display unit and to the control input of the second switch, the output of the first k D D-stop is connected to (L the first input of the second element OR and through the second register - with home g of the adder, the output of which is connected to the information input of the second switch, the output of which is connected to the second input of the second OR element, the output of which is the device output, characterized in that, in order to increase the device bandwidth, the third OR element is entered into it, the shift register and the prohibition unit, the output of which is connected to the second input of the imaging unit, the information input is connected to the second output of the keyboard, and the control input is connected to the output of the shift register and the first input of the third element and OR, the second input of which is connected to the output of the first comparison unit, and the output to the input of the inverter, the control input of the shift register is connected to the output of the second comparison unit.

Description

The invention relates to computing and is intended for use in information input devices primarily from the keyboard when creating machine carriers or computer input.

A device for inputting information is known, comprising a keyboard, a driver, first and second registers, a random access memory unit, a first comparison unit, a display unit, an adder. The keyboard is connected to the first input of the imaging unit and to the input of the first register, the output of which is connected to the information input of the RAM, the control input to the output of the imaging device, and the output to the first input of the first comparison unit. The output of the second register is connected to the input of the summa. P.

The disadvantage of the device is reduced throughput.

The closest to the invention to the technical nature is a device for inputting information, comprising a keyboard, a driver, first, second and third registers, a RAM, the first and second comparison blocks, a display unit, an adder, a delay element, an inverter, a counter, the first the second and third elements are AND, the first and second elements are OR, the first and second switches, the first output of the keyboard is connected to the input of the first register, the output of which is connected to the information inputs of the RAM and the first switch To the first input of the first comparison unit, to the first inputs of the second comparison unit and the display unit, the output of the imaging unit is connected to the first inputs of the first and second I elements and to the control input of the one-way memory, the output of which is connected to the second input of the first comparison unit, the first input of the first element PfflH is connected to the output of the first comparison unit and through the inverter is connected to the second input of the first element I, the output of which is connected to the second input of the display unit and to the counting input of the counter, connected to the secondary eye input of the second element And, the output of which is connected to the third input of the display unit and to the second input of the first element OR

the output of which is connected to the second input of the imager, to the control input of the counter, to the control input of the first switch and through the element: delays to the first input of the third element I, the second input of which is connected to the output of the second comparison unit, the first input connected to the output of the third register , the output of the third element And is connected to the fourth input of the display unit and to the control input of the second switch; the output of the first switch is connected to the second input of the second OR element and through serially connected the second register and the adder with the information input of the second switch, the output of which is connected to the first input of the second OR element, the output of which is the output of the device 2J.

However, the known device does not have a sufficiently high throughput capacity.

The purpose of the invention is to increase the capacity of the device.

This goal is achieved in that the device for inputting information, comprising a keyboard, a driver, first, second and third registers, a memory unit, the first and second comparison blocks, a display unit, an adder, a delay element, an inverter, a counter, the first, second and the third elements AND, the first and second elements SHS, the first and second switches, the first keyboard output is connected to the input of the first register, the output of which is connected to the information inputs of the RAM and the first switch, to the first inputs of the first and the second unit of comparison and the display unit, the output of the imager is connected with the first input of the first and second elements

And with the control input of the operating unit

memory, the output of which is connected to the second input of the first comparison unit, the first input of the first element OR through the inverter is connected to the second input of the first element AND whose output is connected to the second input of the display unit and to the counting input of the counter, the output of which is connected to the second input of the second AND element, the output of which is connected to the third input of the display unit and the second input of the first OR element, 3 output of which is connected to the first input of the driver, with the control input of the counter, with the control input of the first switch ora and through the delay element - with the first input of the third element And, the second input of which is connected to the output of the second comparison unit, the second input of which is connected to the output of the third register, the output of the third element And is connected to the fourth input of the display unit and to the control input of the second coma first, the output of the first switch is connected to the first input of the second OR element and through the second register to the input of the adder, the output of which is connected to the information input of the second switch, the output of which is connected to the second input of the second element nta OR, the output of which is the output of the device, the third shsh element, the shift register and the prohibition block, the output of which is connected to the second input of the shaper, the information input connected to the second output of the keyboard, and the control input are entered the first input of the third SHS element, the second input of which is connected to the output of the first comparison unit, and the output to the input of the inverter, the control input of the shift register is connected to the output of the second comparison unit. The drawing shows the block diagram of the proposed device. The device comprises a keyboard 1, the first register 2, the RAM block 3, the first switch 4, the first comparison block 5, the indication block 6, the second comparison block 7, the third register 8, the third element AND 9, the shift register 10, the block 11 for Preta, driver 12, first and second elements AND 13 and 14, third element OR 15, first element OR 16, inverter 17, counter 18, delay element 19, second switch 20, second element OR 21, display element 22, second register 23, su mator 24. Operational memory unit 3, simplifying the process of preparing computer carriers for them It has a capacity to store the entire string and serves to store a string of characters. The first register is for 8L to quickly store the character code of the entered information. Shaper 12 sets the write or read mode to memory 3. The display unit 6 serves to display the information arriving at its input and signaling a detected error. The shift register 10 serves to select the information input mode — single or double dialing, depending on the code of the number recorded in the register and shifted by one bit as the end of line command from the second comparison unit is received. The prohibition unit 11 serves to control the operation of the imaging unit using the shift register signals and can be performed according to the known prohibition logic element scheme. The display element 22 serves to display a sign of a single or double set of information and can be performed by any known method. The device works as follows. Each line of information is typed on the keyboard 1 once or twice, depending on the state of the shift register 10. If there is no signal at the output of the register 10 (signal O), the line is typed, and on the keyboard 1 twice. At the first dialing, the code of the next character received from the keyboard 1 via the code buses is written into register 2. With the arrival of the next sync pulse from the second output of keyboard 1, the prohibitor block 11 allows the driver 12 to write information to the main memory 3 and change the address of its next memory free memory space. Similarly, the characters of a single line are sequentially typed. At the second set of the same line, the code of the next character received from the keyboard 1 by code code is written to register 2. When the sync pulse is received from the keyboard 1 through the prohibition block 11 by the shaper 12, the address of the next memory field of the 3 RAM is changed and the translation is performed it is in read mode, thus allowing the comparison in block 5 of the character code of the first set, previously written in block 3 of the RAM and the corresponding character code of the second set (recorded in register 2). When the codes received are received: at both inputs of the comparison unit 5, the signal repeated by the elements OR 15 and 16, which performs the following functions, is output at its output: allows the signal to pass through the code buses through the first switch 4, sets the counter 18 to the initial the position allows the shaper 12 to increase the address of the memory field of the memory unit 3. The OR 15 element controls the operation of the OR 16 element, depending on the signals from the comparison unit 5 and the shift register 10 received at its inputs. Thus, if the first input of the OR 15 element does not contain a register 10 signal on the OR element 16, the input signal comes from the comparison unit 5 in case of coincidence of character codes of dvz-x sets. When the first switch 4 arrives at the control input from the output of the OR 16 element, a signal allowing information transfer, the code recorded in the register 2 through the switch 4 and the OR 21 element goes to the output of the device, and through the serially connected register 23 and the adder 24 - to the input of the switch 20. From register 2, information is also supplied to the second comparison unit 7, which generates a control signal when a code arrives at the input of the device, indicating the end of the record. This code is permanently stored in a memory register 8 connected to another input of the comparator unit 7. The signal of the comparison unit 7 produced in this case is sent to the control input of the shift register 10 and to the input of the third element AND 9, to the second input of which the signal of the element OR 16 is transmitted through element 19 of the holder. When two signals arrive at the third element 9 at the same time, a control signal is generated at its output, allowing the second switch 20 to issue through the second element OR 21 to the output device of the content of the caster 24. When the next lines of information arrive, the device's operation cycle repeats. If the inputs of the comparison unit 5 receive from the memory unit 3 and the register 2 different codes, then the second input of the first element AND 13 through the element OR 15 and the inverter 17 are fed with a reference signal. With the arrival at the first input of the control signal element I 13, which transforms the memory unit 3 into the read mode, a signal is generated which increases the contents of the counter 18 by one and enters the display unit 6. This signal enables the indication of an error indication. Thus, the discrepancy between the values of the first and second sets when symbolically comparing them serves as an error sign, blocking the changing of the address of the block 3 of the RAM by the drivers 12 and the receipt of the next character code at the device output, since the OR 16 control signal will not be generated. The correction of the error occurs in two ways: if the error was made during the second set, then in case 2, after the second set, the device made a mistake, as described above, provided that the character codes match. Errors made during the first dialing are corrected by repeatedly supplying the correct character to the device input from the keyboard 1 according to the capacity of the counter 18. In this case, after each input of the next character to the device, the contents of the counter 18 are incremented by one. After overflow, a control signal appears at the output of counter 18, which arrives at the second input of element AND 14. When a control signal arrives at its first input from generator 12, an output signal of element 14 appears, which is fed to the third input of unit 6 indication, the output of the error indication indication, and the input of the first element OR 16. Thereafter, the device continues to operate in the order described above for the case of matching the character codes of the first and second sets. When a shift register 21 appears at the output (symbol 1), the information line on the keyboard 1 is dialed once. This signal at the output of the shift register 10 performs the following functions: blocks the arrival of clock pulses through the prohibition block 11 into the driver 12, enables the indication element 22 to indicate the indication of a one-time dialing, through the elements OR 15 and OR 16, to the control input of the first switch 4, allows transmitting the character code from the second register 23. The code of the next character received from the keyboard 1 via the code buses through the first register 2, the first switch 4 and the second element OR 21 arrive at the output of the device. In this case, all the other blocks and elements of the device, except for the former 12, the RAM block 3 and the first comparison block 5, work in the same way as with the second row set in the absence of errors. Since the first input of the imaging unit 12 is blocked by the interdiction unit 11, the state of the imaging unit 12 remains unchanged and maintains the operational memory block 3 in the read mode of the initial memory address, which leads to the absence of a signal at the output of the first comparing unit 5. When the second block 7 compares in js a sequence of character codes coming from the output of the first register 2, the write end code generates a control signal, changing the state of the shift register 10 to the 091. The further operation of the device is determined by the new signal as a result of the shift of the code in the code of the shift register 10. The advantage of the device, as compared with the known, is the introduction into the design of the prohibition block, an additional IDN element, a register and an indication element that allow Sit input performance information into the computer so by providing the desired level of reliability of the input information. For this, selective sampling of all and only parts of the input information lines is used. Due to this, the time and money spent on entering information from the web at the AC time is reduced by checking out the 10% rate of time by a given accuracy. Specific from information controlled with the second goal by the method of double dialing, is determined from pressing out to, - the accuracy of the input of information by the operator upon a single entry, / 1 - the accuracy of the output information in the double set of information, (P °.} (/ ST /), 11 1 specific weight of information correspondence in a VALUE without control or double dialing, V ,, 0 From this expression For example, for a subsystem of operative production control, UE is usually required to / i 10, as the accuracy of the input of the opera the torus tO. It’s right that the specific weight subject to control (V) puts the ViS: 1.V, .9. Thus, ensuring accessibility 10 allows us to send a continuity, inputting information to. The specific weight of information lines controlled by a double set of information, the contents of the needles register are defined by the number of t recorded in it according to the ratio.Thus, using the device it is possible to ensure the required level of reliability of information in the functional tasks of the ACS, to determine the economically justified amount of controlled information, loss of errors. In addition to direct savings from reducing the number of errors to the complexity of data entry, the use of the device has a social effect, which consists in reducing the workload of the data preparation operator, increasing its productivity and increasing the degree of satisfaction with its work.

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Claims (1)

DEVICE FOR INFORMATION INPUT, containing a keyboard, a shaper, first, second and third registers, a RAM block, the first and second comparison blocks, an indication block, an adder, a delay element, an inverter, a counter, the first, second and third elements And, the first and second OR elements, first and second switches, the first output of the keyboard is connected to the input of the first register, the output of which is connected to the information inputs of the RAM block and the first switch, to the first inputs of the first and second comparison blocks and the indication block and, the output of the driver is connected to the first inputs of the first and second AND elements and to the control input of the RAM block, the output of which is connected to the second input of the first comparison unit, the first input of the first OR element is connected through the inverter to the second input of the first AND element, the output of which is connected to the second input of the indicating unit th to the counter input of the counter, the output of which is connected to the second input of the second AND element, the output of which is connected to the third input of the indicating unit and the second input of the first OR element, the output of which connected to the first input of the shaper, to the control input of the counter, to the control input of the first switch and through the delay element to the first input of the third AND element, the second input of which is connected to the output of the second comparison unit, the second input of which is connected to the output of the third register, the output of the third And element is connected to the fourth input of the display unit and to the control input of the second switch, the output of the first switch is connected to the first input of the second OR element and through the second register to the adder_input, output otorogo connected to the information input of the second switch, the output of which is connected to the second input of the second OR element, the output of which is the output of the device, characterized in that, in order to increase the throughput of the device, the third OR element, the shift register and the block prohibition are introduced into it, output which is connected to the second input of the driver, the information input is connected to the second output of the keyboard, and the control input to the output of the shift register and the first input of the third OR element, the second input of which is connected nen with output of the first comparator, and an output - to the input of the inverter, the control input of the shift register is connected to the output of the second comparator unit. SU „„ 1149238