SU1084791A1 - Generator of multidimensional random variables - Google Patents

Abstract

GENERATOR OF MULTI-DIMENSIONAL RANDOM VARIABLES, containing a clock pulse whose input is an input of the generator start, a clock pulse generator output connected to the input of the first generator of uniformly distributed random numbers, to the input of the delay element and to the control inputs of the group memory blocks, the output of the first generator uniformly distributed random numbers connected to the first inputs of the group adders, the second inputs of which are connected to the output of the delay element, the third inputs of the group adders the corresponding memory blocks of the group are connected, the outputs of the group adders are connected to the corresponding inputs of the first encoder, the input of the generator start is connected to the input Reset of the number register input record which is connected to the output of the delay element, the information output of the number register is connected to the first address inputs of the memory blocks group, characterized in that, in order to obtain the optimal ratio of speed and accuracy, it contains a counter, switch, register mask, a group of elements And the second cipher p, comparison unit, second generator of uniformly distributed random numbers, a group of OR elements and an AND element, the installation input of the counter is connected to the generator Start input, the counting counter input is connected to the generator output as follows (Lt. pulses, and the information output of the counter is connected to the first inputs the switch and the comparison unit and with the second address inputs of the group memory blocks, the second switch input is connected to the output of the first encoder, the switch x outputs are connected to the group of inputs of register 4 from the number Naturally, the mask register input is entered by the generator information input, the mask register outputs are connected to the inverse inputs cor of the corresponding AND elements of the group and to the input group of the second encoder, respectively, the direct inputs of AND elements of the group are connected to the output of the second generator of uniformly distributed random numbers, the input of which is connected to the output of the clock generator, the outputs of the elements AND groups and the first group of outputs of the register of the number connected to the corresponding inputs of the corresponding elements OR groups py, you

Description

the second encoder stroke is connected to the second input of the comparator unit, the output of which is connected to the blocking input of the clock generator and to the first input of the AND element, the second input of which is connected to 91 outputs of the delay element, output of the AND element is the generator output, the second group of outputs of the number register and the group of outputs of the elements OR of the group are respectively groups of outputs of generator bits,

The invention relates to computing and can be used in solving problems of modeling systems, taking into account the effect of random external disturbing factors and random deviations of object parameters, as well as in the creation of stochastic computers and multichannel sensors of random signals. Devices are known for forming multidimensional random variables with predetermined statistical characteristics. A multichannel random number generator is known that contains a primary source of random pulses, an impulse shaping unit, a low-pass filter, a key, an amplitude selector, a memory unit, a matrix switch, a multiphase multivibrator, a pulse shift register, a frequency divider and a control unit m. However, this device generates only independent random numbers and does not provide the possibility of modeling multidimensional random variables with an arbitrary given multidimensional law of probability distribution. A device for probabilistic modeling is known, which contains a generator of uniformly distributed random numbers, an address register, a memory block, a number register, a mask register, a comparison block, and a control block 2. The specified device does not allow the formation of multidimensional random variables with an arbitrary given multidimensional law of distribution of probabilities, since, in accordance with the use of the principle of operation and structural organization in its construction, this device is focused on the formation of one-dimensional random variables. The simulator of multidimensional random variables is known, which has a generator of clock pulses, the first and second delay elements, the trigger, the first and second elements AND, the generator of uniformly distributed random numbers, the adder, the memory block, the address register, the number register З. However, in this device, multidimensional random variable values are formed in a random manner, as a result of which it has a low response rate. The closest technical solution to the proposed device is a multidimensional random variable generator, which contains a clock pulse generator, the triggering input of which is the first input of the device, and the clock pulse generator output is connected to the inputs of the first generator of uniformly distributed cases: idle numbers, delay element and the first the inputs of a group of memory blocks, the output of the first generator of uniformly distributed random numbers is connected to the first inputs of a group of adders, the second inputs of which x are connected to the output of the delay element, third inputs. groups of adders are connected to the outputs of a group of memory blocks, outputs of a group of adders are connected to the inputs of the first encoder, in addition, the first input of the device is connected to the first input of the number register, the second input of the number register is connected to the output of the element delays, the outputs of the number register are connected to the second inputs of the group of memory blocks 41. A disadvantage of the known device is that it does not provide the ability to control the accuracy and speed in the formation of the values of multidimensional random variables, which limits its functionality. The purpose of the invention is to obtain the optimum ratio of speed and accuracy. The essence of the invention lies in the fact that for a given total difference N of the components of the multidimensional random variable X Gx, X2, ..., X, multidimensional random variables are formed with controlled accuracy and speed. Such control is carried out by setting and forging a certain number of high order bits of each of the components X ,,, X2, ..., Xc. on the original multidimensional distribution function f (, X2, ..., x,). The missing least significant bits of each of the components are formed simultaneously with the first two as equal random codes. This allows you to increase speed if you don’t need to form multidimensional random variables with high accuracy. In addition, it is possible to accurately form multidimensional random variables if it does not require high speed. To achieve this goal, a multidimensional random variable generator containing a clock pulse generator whose input is the generator start input, a clock pulse generator output is connected to the input of the first, a generator of uniformly distributed random numbers, to the input of the delay element and to the control inputs of the memory blocks. these groups, the output of the first generator of uniformly distributed random numbers is connected to the first inputs of the group adders, the second inputs of which are connected to the output of the delay element, Lu group inputs of adders are connected to outputs of the respective blocks of memory groups, the outputs of the adders of the group connected to the corresponding first encoder WMOs give, Start generator input coupled to the first control input of the register, whose second control input is connected yuschy. to the output of the delay element, the information output of the number register is connected to the first address inputs of the memory blocks, a counter, a switch, a mask register, a group of AND elements, a second encoder, a comparison unit, a second generator of uniformly distributed random numbers, a group of OR elements and an AND element, the installation input of the counter is connected to the input of the generator start, the counter input of the counter is connected to the output of the clock pulse generator, and the information output of the counter is connected to the first inputs of the switch and comparison unit and with the second address inputs of the group's memory blocks, the second input of the switch is connected to the output of the first encoder, the switch outputs are connected to the number register input group, respectively, the mask register input is the information input of the generator, the mask register outputs are connected to the inversion inputs of the corresponding AND elements of the group and to the group of inputs of the second encoder, respectively, the direct inputs of the elements AND of the group are connected to the output of the second generator of uniformly distributed Random numbers, the input of which is connected to the output of the clock pulse generator, the outputs of the AND groups and the first group of outputs of the number register are connected to the corresponding inputs of the OR elements, the output of the second encoder is connected to the second input of the comparator, the output of which is connected to the block input of the clock generator and the second the input of which is connected to the output of the delay element, the output of the AND element is the output of the generator, the second group of outputs of the number register and the group of outputs of the OR elements of the group are respectively but by groups of outputs of generator bits. FIG. 1 shows a block diagram of a generator of multidimensional random variables; in fig. 2 is a block diagram of a first encoder; in fig. 3 is a block diagram of a second encoder; in fig. 4 block diagram of the switch; n- FIG. 5 is a block diagram of a comparison block. . The multidimensional random variable generator contains a generator of 1 clock pulses, the first generator of 2 evenly distributed random numbers, a delay element 3, a group of 4 memory blocks (BP), a group of 5 adders, a first encoder 6, a register of 7 numbers, a counter 8, a switch 9, mask register 10, group 11 of elements AND, second encoder 12, comparison unit 13, second generator 14 of uniformly distributed random numbers, group 15 of elements OR, and element 16. The first encoder 6 (FIG. 2) contains group 17 of elements AND and groups Pu 18 elements OR. The second encoder 12 (Fig. 3) contains a group of 19 elements And and a group of 20 elements OR The switch 9 (Fig. 4) contains a decoder 21 and a group of 22 elements AND Comparative unit 13 (Fig. 5) contains a group of 23 adding elements and modifying two OR-NOT 24. The generator of multidimensional random variables works as follows, First generator 1 clock pulses, first generator 2 uniformly distributed random numbers element 3 delays, group 4 memory block, group 5 adders, first encoder 6, register 7 numbers and counting 8 provide simultaneous pho ation K bits multivariate random variable. However, in contrast to the known device, in which the listed blocks form successively the values of the multidimensional random variable X, X ,,, ..., X, jZ, in the proposed generator of multidimensional random variables in the first cycle is formed by one high order X4, Chl, ..., Hz. In the subsequent cycles, the number of which is defined with the code recorded in the mask register 10, is formed by one of the following bits of the components Xj ,. If a code is recorded in mask register 10, which determines the 1st formation not of N / K, but fewer bits for each of the components XifjX X, then at the end of the formation cycle the missing bits are filled with codes produced by the second generator 14 of uniformly distributed random numbers . The formation of the Kp; of the hazard codes of the components of the multidimensional random variable X (x, X2, X) is carried out as follows. A Start signal is sent to the first input of the device. This signal goes to the trigger input of the 1 clock pulse generator and to the first register input 7 of the number Under the influence of this signal, the clock pulse generator 1 begins to beat the clock pulse sequence, and the 00 ... 00 code is written to the number register 7. The pulse generated by the clock pulse generator 1 is fed to the input of the first clock generator 2 p. randomly distributed numbers, as well as to the input of the element 3 delays and to the first inputs of a group of 4 memory blocks. The first generator of 2 uniformly distributed random numbers generates a value of a random number uniformly distributed in the interval O; t} ... The first inputs of group 4 of memory blocks are read out information from cells whose address is stored in register 7 of number and in counter 8 and is fed to the second and third inputs of group 4 of memory blocks. Thus, upon receipt of the first clock pulse, information is read from cells of group 4 of memory blocks. The group of 4 memory blocks stores data on the multidimensional probability distribution function (chl, xn, ..., x), recorded as negative numbers in the reverse code. From the outputs of the first generator 2 evenly distributed (noise numbers and a group of 4 memory blocks, the numbers go to the first and third inputs of the group of 5 adders, respectively. At the end of the interval1, the time specified by the delay element 3, clock pulse: goes to the second inputs of the group 5 of adders, allowing the performance of the operation of adding the numbers received to the first and third inputs of the sigma 5 group. The adders included in the group 5 of the adders are combinational circuits, at the outputs of which binary signals are generated transfer numbers. When adding the numbers received at the inputs of group 5 adders, a uniformly distributed random number is compared with probability codes read from group 4 memory blocks. Since probability codes are stored in group 4 memory blocks the opposite code, the input of the first encoder 6 receives a code of the form 11 ... 100 ... 00. In this code, the information bit is the bit in which the last (starting from the lower bits) single signal is formed. A group of 17 elements AND, included in the first encoder 6, selects this signal and passes it to the inputs of a group of 18 elements. SHSh. The inputs of the group of 18 elements OR are connected to the outputs of the group of 17 elements AND in such a way that the inputs of the i-ro element OR (, 2, ..., K) of the group 18 elements OR are connected to the outputs of the JX elements AND (j 2 (1 + 2n) ; P 0,1,2 ...) group 1 of the elements And, which allows to transform the unitary code taken from the outputs of the group 17 of the elements And,,. in binary code obtained at the outputs of a group of 18 elements of SH. Thus, at the output of the first encoder 6, a code is generated that determines K of the higher bits and qx Xi Chl,, X of a multi-dimensional random variable X. The Start signal received at the first input of the device arrives at the first input of the counter 8 and sets it to state 11 ... 111. The first pulse produced by the generator of 1 clock pulses, the transfer of counter 8 to the state 00 ... 000. This code goes to the first input of the switch 9, on the second input of which at the moment there is a K-bit code defining the highest order of multidimensional random variables. Switch 9 works as follows. The M-bit code received at the first input of the switch 9 is transmitted to the inputs of the decoder 21. The decoder 21 converts the M-bit binary position code to the 2-bit unary code, as a result, when the code 00 is received at the input of the decoder 21. ..000 a single signal is produced at its first output. From the first output of the decoder 21 a single signal is fed to the first inputs of the elements And 22, 22, ..., 22 ;. From the second input of the switch, the 9K-bit code goes to the second inputs of the N / K groups of 22 AND elements and passes the outputs of the 2222 12 1ic elements to the first inputs of which resolving signals are present. From the outputs 1,2, ..., K of the switch 9, the upper K bits of the multidimensional random variable are fed to the inputs of the lower K bits of the register of the 7th number and are recorded with a clock pulse coming from the output of the delay element 3 to the second input of the 7th number. In the mask register 10, the (N-K) mask code transmitted from the second input of the device is stored. The mask code determines the number of bits that must be formed for each of the components of the multidimensional random variable XY) X2, ... The presence of units in a group of K bits means that it is necessary to form the next bits consisting of khtsih, ... the zeros in the group of K bits means that the data and the subsequent bits of the components X X, ..., Xj need not be formed. From the output of the mask register 10, the mask code is transmitted to the outputs of the second encoder 12 and is converted into a binary code specifying the number of ticks of the formation of a multidimensional random variable value. Since in each clock cycle one bit is formed for each cam of the components, ..., X |, then the maximum possible number of clock cycles is N / K. The second t2 encoder works as follows. Input signals are fed to inputs 1,2, ... N-K. Informative are the signals j coming to the inputs 1, K-I, 2K + 1 ,. .., N-2K + 1, since the input signals are received in groups of K bits. From the inputs t, K-f1, 2K + 1, ..., N-2K + 1, the signals are transmitted to the inputs of the group 19 of elements I. In the incoming code, the information in which the last unit is located is informative. A group of 19 elements And allocates this signal and passes it to the inputs of a group of 20 elements of the IPD. The inputs of a group of 20 elements OR are connected to the outputs of a group of 19 elements AND thus 5 that the inputs of the i-ro element OR (i 1,2, ..., M) of a group of 20 elements OR are connected to the outputs j-x ele; 9 -1 cops And ((1 + 2n),, 1,2) groups of 19 elements And, which provides. l TG em conversion unitary code read from the outputs of the group of 19 elements And-, in the binary code obtained at the outputs of the group of 20 elements OR. As a result, a binary code is generated at the outputs of the second encoder 12, which determines the number of cycles needed to produce such a number of bits of the multidimensional random variable X, X2 ,. .., Xj /, which identifies the (N-K) mask code stored in mask register 10. The binary M-bit code of the number of clocks of forming a multidimensional random variable from the output of the second encoder 12 is transmitted to the second input of the comparator unit 13. At the first input of the comparison unit 13, the output code of the counter 8 is present. The comparison unit 13 compares a predetermined number of ticks of a multidimensional random variable with the current value of the number of ticks-formation that is generated by the counter 8. The comparison unit 13 works as follows. The M-bit codes from the outputs of the second coder 12 and counter 8 are fed to the second and first inputs / (Respectively, the sections of the 23 elements of the modulo two module. If the received codes coincide, the outputs of all the elements 23 | (i) of the modulo two are zero the signals that are transmitted to the inputs of the element OR-NOT 24. A single signal is generated at the output of the SHSh-NOT 24 element, meaning that the formation of the next value of the multidimensional random variable is completed. From the output of the comparison block 13, this signal enters the blocking input clock pulses and prohibits clock pulses. In addition, the signal from the output of block 13

Em on the first input element And 16, allowing for this input operation of this element.

After the last clock pulse arrives from the output of the delay element 3 to the second input of the 7th register, the 7th register is written to the last bits of the multidimensional random variable X .X ,. . . , CL L-. ... -h the code formed in register 7 of the number, the width of which is given by the number of units in the register 10 of the mask, goes to the second outputs of the device and to the first inputs of a group of 15 OR elements, with output signals 1,2, ... of the K-th register bits 7 numbers arrive at the first outputs in 1,2, ..., To the th group of the second outputs of the device. When each of the clock pulses at the input of the second generator 14 of uniformly distributed random numbers is produced, an (NK) -digit uniform binary code is generated that is transmitted to the direct inputs of group 11 of elements I. At the inverse inputs of group 11 of elements I, the signal with outputs register 10 masks. The output signals of the second generator 14 of uniformly distributed random numbers are passed to the outputs of only those elements of the group 11 of elements AND, which are opened in the inverse by zero signals received from the outputs of the register 10 of the mask. The signals from the outputs of a group of 11 elements AND are fed to the second inputs of a group of 15 elements OR. After the last clock pulse has been generated and the multidimensional random variable X has been formed in register 7, the signals from the K + 1, K + 2 ,,, jN-ro bits of the 7 register bits and the signals from the outputs of the 11 group of elements And go to the inputs of the group 15 elements OR form signals that specify the value of K + 1, K + 2,.,., N-ro bits of the multidimensional random variable S. At the same time, those bits of the multidimensional random value X, which, in accordance with the register in mask 10, not formed, and, therefore, the corresponding inputs of the elements of group 15 lementov OR 7 outputs a register number of null signals are received, are filled with binary ravnovero tnym

a code from the outputs of a group of 11 elements I. From the outputs of a group of 15 elements OR the generated code N-K of bits of a multidimensional random variable X

fx, X2 Хк п ° Opt b second outputs of the device, moreover the j-th output (, 3, ... N / K) in the i-th group

(, 2К) second outputs of the device receive a signal from Cj - 2 K + i) j-ro output of the group of 15 OR elements.

A clock pulse from the output of the delay element 3 is fed to the second input of the AND element 16, which, after the formation of a predetermined number of bits has been completed, is opened at the first input. This clock pulse passes to the output of the element And 16 and enters the first output of the device, signaling that the value of the multidimensional random variable X GC | , Chl, ..., X |, is formed and is present at the second outputs of the device. On the first group of the second outputs of the device there is the code that makes up the X, on the second group of the second outputs of the device - the code being the component X, ..., on the K-th group the second. device outputs - component code X.

To form the next implementation of a multidimensional random variable, it is necessary to give a Start signal to the first input of the device, after which the formation cycle repeats. If necessary, a new mask code can be written into the mask register 10. The device can operate in automatic mode with periodic receipt of Start signals.

Suppose that it is necessary to form a two-dimensional random quantity X, X2, the values of the components of which are given by two-digit codes, i.e. ,, S 4.

3/32;

P (, X 11) P

A3

P (X 10, Xg 00) Rge 3/32

The values of the probabilities of hitting a multidimensional random variable in the corresponding parts of the area of possible values are recorded in a group of 4 memory blocks as follows:

In BP 1

+ P "+

P t / 4 + P

" ten

 00 I (1/8 02 / Pi) 1/8 20 / P5,) 3/8 22 | R,)

3/8

in BP 2

PI: .- POI - -oz - 42 (

+ R /

+ R / g

Р (Х 00 VOIKP) 1/4 Р (Х 02 | 03 / Р2) 1 / Р (Х 20V 21 / Р, 2. 3/4 Р (Х 22 23 / Р,)

3/4

in BP 3

3/4 RYA + R

 R"

Yu

thirty

 BUOOG 10 | R /) 5/8 02 V03 V 12 | R2) 5/8 20Y 21 v30lPj 7/8 22V23 H32 (R. RL

2P3) 7/8

For the convenience of the comparison operation, negative values of the probability codes in reverse are recorded in a group of 4 memory blocks.

code. Placement of cell data

Looks like this:

Address Contents- Contents- Contents; my BP 1 my BP 2 my BP 3

all bits of the multidimensional random 13 value XG Xv, XL are distributed according to the multidimensional law. To do this, code 11 is entered into the mask register 10. When the first round pulse is applied to the first inputs of the group of 4 memory blocks, the contents of the cells with the address 00001, n data on the second and third inputs of a group of 4 memory blocks. The third inputs of the group of 5 adders receive codes 0111; 1.01111; t. 00111. Let the first generator 2 of uniformly distributed random numbers generate the code 0.00011 by the first clock pulse. When adding a codec with a group of 5 adders, codes 1.00111 are formed 1.10111 1.01111 0.00011 0.00011 0.00011 01.01010 01.11010 01.10010 Adder group 5 performs the operation of comparing probability codes and a code of a uniformly distributed random number. The result of the comparison operation (transfer units) comes from the outputs of group 5 adders to the inputs of the first encoder 6. Since the transfer units from the group of 5 adders to the inputs of the first screen 6 did not arrive, then in the first and second bits of the register 7, enter the code 00 When the second clock pulse is applied to the first inputs of the group of 4 blocks, the contents of the cell with the address 00000 are read. The codes 1.11011, 1.10111, 1.01011 are sent to the third inputs of the group 5 of adders. When the first generator generates 2 uniformly distributed random numbers of code 0.11010 by group 5 summers, the additions are performed: 1.11011Ы01111.01011 h - ++ jO lilL-O-0.110100.11010 10..1000110.00101

The transfer units of all adders of the group of 5 adders produce at the output of the first encoder 6 code 11, which is entered into the third and fourth bits of the register 7 number Code present in register 10 of the mask

11 is converted by the second encoder

12c code 1 coming in second

10.00000 01.11000 01.10000

The transfer signals 100 arrive at the inputs of the first encoder 6 and are converted by it into code 01. This code

is written to the first: and the second bit of the register 7 number by a clock pulse passing through element 3 of the 91 input of the comparison block, After the arrival of the second clock pulse in the counter 8, code 1 is set, which goes to the first 1 output of the comparison block 13, as a result of which In comparison unit 13, a single signal is generated that prohibits further generation of clock pulses. The presence in register 10 of the mask code 11 prohibits the transfer of random numbers from the output of the second generator 14 of uniformly distributed random numbers to the outputs of the device. A code from the outputs of register 7 is transmitted to the second outputs of the device. Thus, the value of the multidimensional random variable X x 01 is formed; X2 01. The second clock pulse passing through the delay element 3 and arriving at the second input of the element 16, at the first input of which there is an enabling signal, passes to the first output of the device, signaling that the value of the multidimensional random variable X is formed. If, to improve speed, it is necessary to form only the highest bits of the components and X by multidimensional law, then code 00 will be entered into the mask register 10. This code is converted by the second encoder 12 to code O, which is fed to the second input of the comparison unit 13. The first clock pulse generated by the generator of 1 clock pulses after the signal input. Starting to the first input of the device allows reading the contents of cells with address 00001 from a group of 4 memory blocks. Let the first generator of 2 uniformly distributed random numbers with respect to ne: to the dead clock impulse, stop the code 0.01001. When adding codes by a group of 5 adders, the codes are formed: l.lOIII 1.01111 1.00111 + + + 0.01001 0.01001 0.01001

holder and received on the second input of the register number 7.

The clock pulse sets the counter 8 to the zero state, as a result, a single signal is generated at the output of the comparison unit 13, which prohibits the generation of clock pulses. The presence in register 10 of the mask code 00 allows the transfer of a random number from the outputs of the second generator 14 of uniformly distributed random numbers to the second inputs of a group of 15 OR elements. Let the second generator 14 of uniformly distributed random numbers generate code 10. This code passes through elements 15 and 152 of a group of 15 elements OR to the second outputs of the device. In addition, the code from the outputs of the first and second bits of the register 7 numbers enters the second outputs of the device. As a result, the value of the multidimensional random variable X x 01, X 10 is formed. If in the first considered case, the formation of a multidimensional random variable value was carried out in two cycles, in the second case, the formation took one measure. The considered example illustrates the capabilities of the proposed device for controlling the speed and accuracy of the formation of multidimensional random variables. A small random value was taken to reduce the description of the example.

The proposed generator of multidimensional random variables is implemented using an integral element base. Known devices do not allow the formation of multidimensional random variables with controlled

laws of probability distribution: with controlled accuracy and speed. By this, a digital computer should be considered as the base object.

I Technical and economic efficiency is determined by the fact that the proposed device provides: the possibility of forming random external disturbances and random parametric deviations of objects whose characteristics are described by multidimensional probability distribution laws, which is especially important when simulating and testing complex technical systems; the ability to control the accuracy and speed of the device in the formation of multidimensional random variables in accordance with the nature of the problem being solved; the possibility of using, in conjunction with a computer, in the composition of computer-modeling complexes, which will increase their performance.

eleven

Fig

Claims (1)

A MULTI-RANDOM QUANTITY GENERATOR, comprising a clock generator, the input of which is the start of the generator, the output of the clock generator is connected to the input of the first generator of evenly distributed random numbers, to the input of the delay element and to the control inputs of the group memory blocks, the output of the first generator of uniformly distributed random numbers connected to the first inputs of the adders of the group, the second inputs of which are connected to the output of the delay element, the third inputs of the adders of the group are connected s with the outputs of the corresponding memory blocks of the group, the outputs of the adders of the group are connected to the corresponding inputs of the first encoder, the input of the start of the generator is connected to the input Reset the number register, the input of which is connected to the output of the delay element, the information output of the number register is connected to the first address inputs of the memory blocks groups, characterized in that, in order to obtain the optimal ratio of speed and accuracy, it contains a counter, a switch, a mask register, a group of AND elements, a second encoder, a comparison unit A second generator are uniformly distributed random numbers, a group of items OR and AND gate, wherein the adjusting input of the counter is connected to the input of _β generator Start counting input of the counter S is connected to the output of the clock and data output of the counter is coupled to first inputs of the switch and the comparator, and with the second addressable inputs of the group memory blocks, the second input of the switch is connected to the output of the first encoder, the outputs of the switch are connected to the group of inputs of the number register, respectively, the mask register is the information input of the generator, the outputs of the mask register are connected to the inverted inputs of the cells of the corresponding elements of the And group and to the group of inputs of the second encoder, respectively, the direct inputs of the elements and groups are connected to the output of the second generator of uniformly distributed random numbers, the input of which is connected to the output of the clock the outputs of the AND elements of the group and the first group of outputs of the number register are connected to the corresponding inputs of the corresponding elements of the OR group, GB1ZHP the second encoder stroke is connected to the second input of the comparison unit, the output of which is connected to the blocking input of the clock pulse generator and to the first input of the And element, the second input of which is connected to the output of the delay element, the output of the And element is the generator output, the second group of outputs of the number register and the group the outputs of the elements OR groups are respectively the groups of outputs of the bits of the generator.