SU1076852A2 - Digital electric prospecting station - Google Patents

Abstract

DIGITAL ELECTRIC STROKE STATION on the bus. St. 905994, excluding that, in order to increase speed, an additional digital-to-analog converter is inputted, the output of which is connected to the second input of the comparator, and the control inputs of the additional digital-to-analog converter of the input matching device and the gating input of the main digital-analog converter are connected to the outputs of the software control, the auxiliary information input of which is connected to the second output of the input matching device. , S (L s -O5 00 ate yu

Description

The invention relates to technical physics and can be used in geo-electrical prospecting using methods of polarization, transient processes and resistance. According to the main author. St. No. 905994 is a known digital electrical prospecting station containing an input matching device, the output of which is connected to the comparator input, an operational storage device, the outputs of which are connected to the information inputs of the digital-analogue converter, a two-position three-terminal analog switch, the general contact of which is connected to the output of the digital-to-digital converter, and the first and the second output contacts are connected c6 respectively to the inputs of the matching device and the signal processing unit, the output of the comparator is one with the input program of the control unit, and control outputs connected to the program control unit with address, control and yupshmi informatsionny 4n inputs the random access memory and the input control signals of the processing unit. The known station allows to obtain high accuracy of measurements of parameters of low-frequency signals with significant values of permanent components superimposed on them due to the fact that the useful signal together with the interference - the constant component - is compensated at the input using an ungraded 20-25-bit digital-analog converter. compensation is repeatedly recorded in random access memory, and then, when processing signals, the same digital-to-analog converter repeatedly reproduces in d ugom-time signal in analog form recorded previously, this signal is filtered and accurately measured by d. A disadvantage of the known digital electrical prospecting station is its limited speed, due to the fact that the output voltage, stepwise variable, in accordance with the 20-25-bit code fed to the digital-analog converter, is fed to the input matching device, to which Masaltab amplifiers with automatic measurement limits and low-pass filters should be included. After each step change in the output voltage of the digital-to-analog converter in the input matching device, a transient occurs, which is especially intense when the code of the most significant digits of the digital-analog converter is typed. Since in the process of compiling information about the regime of the first-to-. (More - less) comes all the time from the same comparator, its threshold must be very low, for example 0.25 mV, and to ensure normal conversion of the input signal into the code, the comparator’s output state should be polled only after the signal of the own transient of the amplifiers of the input matching device becomes lower than the threshold of the comparator, i.e. less than 0.25 mV. Taking into account the fact that when the higher significant bit is turned on, a 5V signal appears at the output of the digital-to-analog converter (half of the maximum output voltage /, we obtain the transient time in the input matching device up to tens to hundreds of milliseconds, which is unacceptable in some cases. In this case, even in those cases when the amplitude of the measured signal is small, for example, 10 mV, the process of equilibration begins with switching on the output of a digital-to-analog converter of maximum voltage 5V, h This also significantly increases conversion time. The purpose of the invention is to increase the speed of operation of a digital electrical survey station. To achieve this goal, a digital electrical survey station containing an input matching device whose output is connected to the comparator input, a random access memory, the outputs of which are connected to the information inputs of the digital-analog converter , two-position, three-contact analog key, the common contact of which is connected to the output of the digital-to-analogue The first and second output contacts are connected respectively to the inputs of the matching device and the signal processing unit, the comparator output is connected to the input of the nporpai iMHoro control unit, and the control outputs of the software control unit are connected to the address memory, control and information inputs of the random access memory and the control input of the signal processing unit; an additional digital-to-analog converter is introduced, the output of which is connected to the second input of the comparator, and the control inputs additional audio DAC, the input matching unit and the main entrance gating analog converter connected to outputs of the program control unit, the auxiliary information onny input coupled to the second output of the input matching device. FIG. 1 .dana structural scheme of the proposed station; in fig. 2 is a temporary chart of her work; in fig. 3 is a voltage chart at the output of an input matching device. The digital electrical prospecting station contains an input matching device 1, the input terminals of the station are connected to the first input, a comparator 2, the output of the matching device 1, the software control unit 3, the input of which is connected to the comparator 2 output, are connected to the first input, and input - output of matching device 1, random access memory (RAM | 4, information inputs A, B, C, address inputs G and control inputs D of which are connected to control outputs of block 3 software control, main digital-to-analog converter (DAC I 5, informational inputs of which are connected to outputs of RAM 4 two-position three-contact angled key b, the common contact of which is connected to the output of DAC 5, block 7 of signal processing, additional digital-analog converter (DAC) 8, - the output of which is connected to the second input of the comparator 2, the first and second output contacts of the key 6 are connected respectively to the inputs of the matching device 1 and the signal processing unit 7, and the output of the software control unit 3 laziness also connected with the control inputs cor lasuyuschego device 1 7obrabotki block signals and additional DAC 8, and with entrance gating main DAC 5. A digital electro qi mill operates as follows. In the recording mode, key 6, by command from control unit 3, closes the common contact with the first output contact and thus connects the output of the main DAC 5 to the input of matching device 1. The following command generated in control unit 3 sends the signal O to the Gating input of the DAC 5 and the output voltage of the latter is set to zero. In this preparation for the beginning of the measurement is completed. The first input of the matching device 1 is supplied with a continuously varying ultra-low frequency useful signal with a constant or even slower component superimposed on the non-CW, and the speed of change of the useful signal B moments after switching the polarity of the current in the source of the electromagnetic field is very large (early VP, the processes of formation of the electromagnetic field). The matching device has a high input impedance, contains a two-input adder, the inputs of which are supplied with the measured signal from the bus. Input and signal from the output of the DAC 5, as well as a large-scale amplifier with an automatic switch of the measurement limits and a sampling-storage device at the output. On the next team from block 3. in the input device 1, the gain is set so that the signal at the input of the sample-storage device is optimal, i.e. the gain should be maximized, but when ets and the output amplifier should not be overloaded (as far as the automatic selection of measurement limit schemes are known, any of these schemes can be used in the proposed device). After selection of the measurement limit, the gain code MacmTa6jioro amplifier from the second output of the co-lacquer device 1 is fed to the auxiliary information input of the program control unit and is stored in it. By the next command from block 3 in input device 1, the sample-storage device is disconnected from the scale amplifier, on which the instantaneous amplitude value of the measured signal is recorded. The output voltage of the device 1 is fed to the first input of the comparator 2, and the second input of the last starts to receive stepwise varying voltage from the output of an additional DAC controlled from block 3, the DAC 8 is chosen to be 1012-bit, and the signal going to the first input of the comparator 2, is determined by the method of bitwise balancing by changing the code of the control signal from the output of block 3 to the input of the DAC 8 one by one. The output signal of the comparator entering the input of block 3 indicates the need to increase audio or decreasing the output voltage to DAC 8 until the 12-bit code is set at the DAC input code corresponds to 8. The resulting signal amplitude at the first input of the comparator 2. The amplitude of the signal coming from the ground to the first input of device 1 is less than the amplitude of the signal at the input of comparator 2 by a number equal to the gain factor of the scale amplifier in device 1. Since the gain factor code of the scale amplifier was previously recorded in block 3, the resulting code the signal at the output of comparator 2 is converted to the gain code of the large-scale amplification. The converted code corresponding to the signal code at the input of device 1 is fed to the information inputs A, B, B of RAM 4. At the command received at the control input G, where these codes (12-directional and false code) are written to the RAM 4 and simultaneously arrive at 13 information inputs of the DAC 5. The DAC 5 is most appropriate to perform in the form of two completely identical 10-12-Eja series of converters, the outputs of which are interconnected through an adder, with the output of the adder being the output of the DAC. In this case, the transfer coefficient of the adder at the second input is set 2 times smaller than the first (depending on the number lO or 12) bits of the first converter. In this case, the 12 bit inputs of the first DAC converter 5 are supplied from RAM 4 output with a coarse code for the input of the signal, and the 12 bit inputs of the second converter from RAM RAM are code O. Therefore, after receiving a command from block 3 to the gating input DAC 5 unlocking DAC 5 (instead of signal O, signal 1 / arrives, the output voltage is set to be close to the input signal to the first input of device 1) The following command from block 3 sets zero output to DAC 8 voltage The gain factor of the scale amplifier in the device 1 is set to maximum, the sample storage device is constantly connected to the output of the scale amplifier. Then, at commands from control unit 3, the code in the next 12 bits of RAM 4 connected to the bit inputs of the second D / A converter 5 changes These coefficients, by a counterbalancing method, achieve zero voltage at the first input of the comparator 2. Commands for increasing or decreasing the code set in the cells of RAM 4 and respectively 13-25 p ADR dah DAC 5, come from the output of a com. Parator 2 to the input of block 3. (according to the usual principle, Much - little). If necessary, the sampling-storage device can be disconnected from the output of the large-scale amplifier for each clock cycle of the input signal. The encoding of the input signal ends after setting the 2024-bit code in the cells of RAM 4 and, respectively, at the inputs of the DAC 5. At the end of the coding cycle from the output of block 3, a signal is sent to the address inputs G of RAM 4 and thus the device is prepared for the next coding cycle, which is performed in the same order as discussed above, only the result of the second encoding is recorded in the other cells of RAM 4. Usually, the frequency of the useful electromagnetic radiation in the ground plane is usually known in advance. the floor Therefore, the recording of signals lasts for at least one period of this signal. At the end of the recording cycle, the key 6 is set to the second position and thus the output of the D / A converter 5 is connected to the input of the signal processing unit 7, which is expedient to perform exactly the same pattern as in the prototype: as a two-input adder, to one of the inputs of which key b, to the other - the output of the auxiliary DAC, and to the output - the input of a graduated DAC. During signal processing, commands from the output of block 3 begin cyclically with a high frequency (several tens of hertz) to forward signals to the address inputs of G RAM 4. In this case, the output of the DAC 5 will receive the same signal that was input to the device 1 the recording time, but this signal will be played on a different time scale. During the processing, the constant component of the coded signal is compensated first in block 7 with the help of an auxiliary DAC. For this, the output voltage of the auxiliary DAC changes until the amplitude of the positive and negative half cycles at the output of the adder becomes the same, as recorded by the analog-digital converter readings in the block. After that, the received signal is converted to a digital code using a graded ADC in block 7, which can have 10-12 bits, and then processed using digital filtering techniques. As in the prototype, block 7 can be made in the form of an analog processing device, for example, a selective millivoltmeter, us1: turn on the frequency of the measured signal multiplied by the number of times equal to the scale of the change in the playback time of one period of the signal compared to the recording time. Low frequency Sih E (Fig. 21, together with the constant component EQ superimposed on it, first over the time interval T-J-12 repeatedly

is encoded using the preset station, and the resulting codes are stored in RAM and stored there. Then, after the low frequency signal period has elapsed, the coding cycle ends and the signal processing cycle begins. For this, the analog switch 6 is set to the second position. Using the main DAC 5, the digital codes are repeatedly converted into an analog signal whose form is shown on the time interval Tj-T (Fig. 2 /).

Since the frequency of the reproduced signal is much higher than the frequency of the working signal, then using the signal processing unit 7, which contains selective amplifiers or other filters, the unnecessary component EQ is easily separated and the necessary parameters of the useful signal are extracted.

In order to reproduce the original signal without distortion, a sufficiently high coding frequency of the original signal is necessary. In the proposed station, the signal E to be encoded in each cycle (Fig. 3) is converted to a digital code in the time interval T using an additional DAC 8 and comparator 2. As in this coding cycle, the stepwise variable signal is not received at the input of unit 1 ( difference from the prototype, the transient process in the filters of block 1 does not occur and the coding speed is determined only by the speed of the DAC 8 and the comparator 2.

At the end of the coarse coding cycle, the code obtained using the DAC 8 is written into RAM 4 and then transmitted to the main DAC 5. The voltage at the DAC 5 output at the time Tj is fed to the second input of the matching device 1, the output of which is a signal mismatch E, the amplitude of which does not exceed 5 mV. After termination of the transient process in block 1 by means of a DAC 5, a stepwise compensation of the signal E is started by the method of successive approximations (bit balancing / on the time interval T, - T7 (Fig. 3). As soon as the voltage at the output of the device 1 becomes zero, the windows a valid exact compensation code is recorded in RAM. Thus, a 25-30-bit code is recorded in RAM, which in digital form cannot serve as an exact code of the true value of the measured signal, since the DAC 5 has only 10-12 graduated bits . One ko, if a 25-30 digit code is applied to this DAC, an analog signal will be received at its output, reproducing the original measured signal with a high degree of accuracy.

The performance of the proposed station is achieved by the fact that in the process of a rough determination of the signal code, the second input of block 1 does not receive stepwise variable voltage.

The proposed station, compared with the base object, which is taken as a prototype, is almost 3 times faster due to the fact that it eliminates the transient processes observed in the prototype at the beginning of the balancing process when steps are fed to the input matching device “Pr 5 and 2.5 V.

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Claims (1)

(541 DIGITAL ELECTRIC TESTING STATION according to author's note No. 905994, distinguished by the fact that, in order to improve performance, an additional digital-to-analog converter is introduced into it, the output of which is connected to the second input of the comparator, and the control inputs 'Additional analog converter input matching unit and the main entrance gating digital to analog converter connected to outputs of the program control unit, the auxiliary information input coupled to a second output _with the input matching device., SS