SU1332334A1 - Device for estimating probability density of a random signal - Google Patents

Abstract

The invention relates to specialized computer facilities and can be used to estimate the one-dimensional probability density of the instantaneous values of random processes, the implementations of which are represented as electrical signals. The aim of the invention is to simplify the device and increase its accuracy. This is achieved by introducing a splitter counter for eight and a conversion unit with a ratio of pulse frequency at its first and second outputs of 4: 3, which eliminates the auxiliary signal generator — a random uniformly distributed generator. analog adders. The device contains comparators 1-4, elements EXCLUSIVE OR 5.6, a counter-divider by eight 7, a digital reference block 8, a current source 9, a voltage divider on three resistors 10-12, a digital-to-analog converter 13, a clock pulse generator 1 Л, block 15 conversions. 5 il. I (L SAZ 00 ke co with 4

Description

one

The invention relates to specialized computer technology and can be used to estimate the one-dimensional probability density of instantaneous random process data, the implementations of which are represented as electrical signals.

The purpose of the invention is to increase the accuracy and simplify the device.

Figure 1 shows the structural diagram of the device; Fig. 2 illustrates a weighing function implemented by the proposed device; Fig. 3 shows the weighing function implemented by a known device: Fig. 4 is a schematic diagram and timing diagram of the counter-divider by eight; Fig. 5 is a diagram and timing diagrams of a conversion unit with a 4: 3 pulse frequency ratio.

The device contains comparators 1-4, elements EXCLUSIVE OR 5 and 6, counter-divider 7 by eight, block 8 of digital reference, current source 9, resistors 10-12, digital-to-digital converter 3, clock generator 14 block, 15 recalculations with the ratio of pulse frequency on the first 16 and second 17 outputs 4: 3 and the counter 18 pulses

The comparator performs the same functions as the amplitude discriminator In a known device. The counter-divider 7 on the capacity & performs the function of reducing the pulse frequency at the output by eight times compared with the frequency at the input (figure 4).,

The conversion unit 15 performs the function of changing the pulse frequency at the first and second outputs in a 4: 3 ratio (Fig. 5).

To set the base of the weighing function, there is a current source 9 and a digital-analog converter 13, between the outputs of which a voltage divider is included, consisting of three resistors 10-12.

The elements EXCLUSIVE OR 5 and 6, block 8 of the digital counter and the generator 14 TI can be implemented on typical chips of digital computer technology.

The device works in the following way.

323342

At the beginning of 1, the measurement curve is set such a voltage at the output of the D / A converter 13 so that the middle of the weighing function coincides with the lower limit of the analysis range. The width of the differential corridors corresponding to the basis of the weighing function is given by the current.

10 sources 9 and resistors 10 to 12 of the voltage divider. Resistors 10 and 12 are resistive. a half the resistor 11.

15 If at the moment of comparators gating with 1–4 pulses from the output of block 15, the value of the input signal is between the operation thresholds of comparators 2 and 3, then at the output

20 elements EXCLUSIVE OR 5, a pulse arises, which is carried out by summing the input of block 8 of the digital readout. At the same time, a pulse is emitted and at the output of the element EXCLUSIVE OR 6,

25 since the trigger thresholds of the comparators 2 and 3 are between the trigger thresholds of the comparators 1 and 4. If the value of the input signal is between the thresholds of the trigger 30 of the comparators 1 and 4, but does not fall between the thresholds of the comparators 2 and 3, then the pulse, the pulse is formed only at the output of the element EXCLUSIVE OR 6. Pulses from the output

The 35 of element 6 is fed to the subtractive input of the digital counting unit 8 through the counter-divider 7 by eight, therefore, only the eighth eighth pulse is fed to the subtracting input of the digital counting unit 8.

Let us denote the average pulse frequency at the output 17 of the block 15 F, and the pulse frequency

at output 16 F --- F. If the signal values are such that pulses appear only at the output of the EXCLUSIVE or 6 element, then at the subtractive input of the digital reading unit 8 the pulse frequency

F 1- F 1 i 8 1 6

F. If value

the input signal is such that pulses appear at the outputs of elements 5 and 6, then the resulting pulse frequency at the inputs of block 8 of digital digital F - F, j

 Thus, the weights of the differential corridors are formed with the function h (Z).

The counter 18 counts the number of pulses from the output 17 of the recalculation unit 15 and, after dialing a given amount, outputs a pulse arriving at the control input of the digital reading unit 8. With this pulse, the measurement results are written to the digital reading unit 8, and the output voltage of the converter 13 increases by one step, advancing the differential corridors to the upper end of the analysis range. After this, the next measurement cycle starts. This process continues until the upper limit of the analysis range is reached. In this case, in block 8 of the digital readout, all the results of measuring the probability density values are recorded.

Claims (1)

Invention Formula A device for estimating the probability density of a random signal, containing the first, second, third and fourth comparators, a clock generator, a digital readout unit, the first and second elements EXCLUDING OR, a current source, a digital-analog converter, a pulse counter and a voltage divider . the extreme terminals of which are connected respectively to the outputs of the current source and the digital-analog converter, and the middle terminals of the voltage divider are connected respectively to the first inputs of the comparators, the second inputs of which are combined and are the information input of the device; the inputs of the second element EXCLUSIVE OR are connected respectively with the outputs of the first and fourth comparators, while the output of the first element The inverse OR is connected to the first information input of the digital-digits unit, the control input of which and the input of the digital-to-analog converter are connected to the output of the pulse counter, characterized in that, for the purpose of improving accuracy and simplification, it contains a divider counter by eight and a conversion unit whose input connected to the output of the clock generator, and the first and second information outputs are connected respectively to the gate inputs of the comparators and the input of the pulse counter, the output of the second element EXCLUSIVE ITS OR through the counter-divider by eight is connected to the second information input of the digital readout block. h (L)% -and - & k L FIG 2 Jl BZ-K155LN1 II m nnnnnnnnnnn U Lg K155LA1 si KmnEs FIG. m-KISSHES TiZ-M55J} P1 -sh LLLLLLL llshish FIG. five Editor V. Petrash Compiled by E, Sechina Tehred L. Serdyukova Order 383A / A5 Circulation 672 Subscription VNIZh1I USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Projecto st., 4 Proofreader S. Shekmar