SU1045367A1 - Pulse expander - Google Patents

Abstract

PULSE EXPANDER, containing the generator of counting pulses, the first element And, the first input of which is connected to the output of the generator of calculating pulses, the output is connected to the summing input of the reversing counter, the V output of which is connected to the input of the first decoder, trigger, the single input of which is connected to the input bus, and output - with the first input of the second element I, a delay unit, characterized in that, in order to expand the field of application by providing an automatic change of the expansion coefficient, the following are entered into it tick, subtracting counter, comparison block, second decoder, inverter, second trigger, third and fourth elements AND, three OR elements, the first input of the third element AND connected to 1 output of the counting pulse generator, the second input connected to the input bus, and the output with the counter input of the counter, the inverter input is connected to the input input and the first input of the first element OR, and the output to the second input of the first element and whose third input is connected to the forward output of the second trigger, the inverse output of which is connected to the second input the second element is And, the third input of which is connected to the output of the generator of counting pulses, and the output is connected to the subtractive input of the reversible counter, the first input of the fourth element I is connected to the output of the first decryptor, the second input is connected to the output of the first trigger, and the output is from the first G the input of the third OR element and with the second input of the first OR element, the output of which is connected to the single S input of the second trigger, the zero input of which is connected to the output of the second OR element, the first and second inputs of the comparison module Inen respectively with the output of the counter and the output of the reversible counter, and the output with the first input of the second and second input of the third element OR, while the output of the third element OR is connected to the first input of the subtracting counter, the second input of which is connected to the recording bus, and the output to the input the second decoder, the output of which is connected to the SP to the zero input of the first trigger and the input of the delay unit, the output of which is a: connected to the second input of the second OR element and to the installation inputs of the reversible counterh to zero and a counter.

Description

The invention relates to measuring and computing technology and can be used to extend the duration of input I1M pulses an integer number of times. A pulse extender containing a reversible counter, a generator of counting pulses, a frequency divider, two AND elements, an IL element and a trigger 1 J p is known. The disadvantage of this device is the distortion of the repetition period of the output pulses and the impossibility of changing the expansion coefficient without rewiring the device. A more advanced is the pulse extender containing a reversible counter, the first and second elements AND, a frequency divider, a decoder, a delay unit, a trigger, a generator of counting pulses, the output of which is connected to the first input of the first element I, and to the first input the second element And through a frequency divider, the first input of the trigger is connected to the second input of the first element And and. to the input bus, and the output is connected to the second input of the second element I, the output of which through the delay device is connected to the computing input of the reverse account 4PiKa, the summing input of which is connected to the output of the first element I, the inputs of the decoder, are connected to the outputs of the reverse counter and the output with the second input of the trigger L2, the disadvantage of the known device is the impossibility of automatically changing the expansion coefficient, which is determined by the division factor of the divider and is rigidly specified for this device, which limits Possibilities of its application in the field of automatic control. Purpose of the invention is the expansion of the application area by providing automation of the device expansion coefficient change. The goal is achieved in that the pulse extender containing the counting pulse generator, the first AND element, the first input of which is connected to the counting pulse generator output. , the output is connected to the summed up input of a reversible counter, the outputs of which are connected to the input of the first decoder, the trigger of which single input is connected with the input bus, and the output with the first input of the second element AND, block delay: and, entered the counter, subtracting counter, comparison block, second de-encoder, inverter, second trigger, third and fourth elements AND, three elementge OR, and the first input the third element And connect with the code generator of counting pulses, the second input is connected to the input practical and the output is co-calculated; P4 input counter / meter, the input of the inverter is connected to the input i bus and the first input of the first element OR, and the output is to the second entry of the first element 1--, the third input of which is soy inn with prmygl vnkholom second trigger, the inverse output of which is connected to the second input of the second element I, the third input of which is connected to the output of the generator circuit of the counting pulses, and the output is connected to the subtractive input of the reversing 1; connected to the output of the first decoder, the second input is connected to the output of the first trigger, and the output from the first input of the third OR element and to the second input of the first OR terminal, the output of which is connected to the single input of the second trigger, zero input one is connected to the output of the second e.pement OR, the first and second inputs of the splicing unit are connected with the output from the c-1tchik and the output of the reversible counter, and the output to the first input of the second and second inputs of the third e.ment of OR , the output of the third element OR is connected to the first input of the subtractive counter, the second input of which is connected to the write bus, and the output to the output of the second decoder, the output of which is connected to the zero input of the first trigger and to. block: .ia.nep: -: -; : w, the output of which is connected to the second input of the second element OR, and with the inputs of the installation in the zero state of the reversible counter and the meter. FIG. 1 shows a block diagram of device i in FIG. 2 — temporal dipgrams. The pulse expander comprises a generator of 1 counting pulses, inperto ;. 2, counter 3, reversible counter 4, which reads the mid-range 5, (pp, 6 and 7, block 8 comparison, trigger, and 10, entries 10-14, elements of OR 1517, b. Delays 18 , input. from i. 19, input 20 of the record, output: .- ain 21, Output of the generator of counting pulses 1 connect - to the inputs of e. mpeg1ts-p And 1113, and the outputs of the elements and 11 And 12 are connected according to the sum of ; -: Ruyugdim and zy. read the input of the p-eversive counter .4, the output of which is connected with the decoder by the second input of b: current 8 sragenenn; Phodna; -; bus 19 devices connecting the island with the nerves;.; by the element element; OR 15, EX .POM - :: -; vegtora 2, single trigger input 10 and with the second input e lame-kg a and 13, the output of which is connected to the counting input - count 3 to, whose course goes by; 1yuchen to the first input of the unit E cTJanneni, and the output of the block 8 from the opposite is connected to the input of the input elements 16 and 17, the output of the inverter 2 сО: -: Tskpei:; c; d: eye the input element I 11, H - E - B; u:

koflHoe condition. If K 4 (FIG. 4), then the signal from the output of the decoder 7 is absent and, therefore, the reset reset is not received on the trigger 9, the counter 3 and the reversible counter 4. The pulse from the output of the decoder 6 (FIG. 4mJ simultaneously with the arrival of the subtractive counter 5 to the input goes through the OR 15 element to the single input of the trigger 9. The trigger 9 is set to one (FIG. 4e) "state and permits the passage of pulses from the output of the generator 1 counting pulses to the summing input of the reversible counter 4, while the negative voltage from the inverse output 15 and trigger 9 prohibits the passage of pulses from the output of the generator 1 of the counting pulses to the subtracting input of the reversing counter 4. After pulses arriving at the 20 summing input of the reversible counter 4. will become equal to that recorded in counter 4 (.fig, 4z), a pulse appears at the output of the comparison unit 8 (Fig. 4i), 25

Further operation of the device is similar to that described above, starting from the moment of the appearance of a pulse at the output of the comparison unit 8 in the case. Only now the output of the trigger 10 will generate a pulse four times longer than the duration of the input pulse (, fig. 4d) If 4, then the subtracting counter 5 9 does not zero, and the entire operation cycle 35 of the device is repeated.

Thus, the device allows the expansion of input pulses at any integer number of times. The design features of this technical solution allow to expand the field of application of the device,

Changing the expansion coefficient in the base device. As a prototype, it is possible only when the device is re-installed. In this case, the continuous operation of the device is disturbed, which significantly reduces the efficiency of the expander in the field of computing and control systems,

The use of the proposed device makes it possible to change its coefficient of expansion directly during operation. This is achieved due to the fact that the device expansion coefficient is specified by a binary code, which allows to automate the process of changing the expansion coefficient. This eliminates the need to interrupt the operation of the expander and, therefore, the operation of the system in which it is used.

Such a change in the expansion coefficient does not require additional labor costs, reduces the time spent on processing and transmitting information, improves the reliability and accuracy of the device, t, e, increases the efficiency of the use of the extender in computer systems and automated control systems.

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Claims (1)

A PULSE EXPANDER, comprising a · counter pulse generator, the first element And, the first input of which is connected to the output of the counter pulse generator, the output is connected to the summing input of the reverse counter, the output of which is connected to the input of the first decoder, a trigger, the single input of which is connected to the input bus, and the output - with the first input of the second element AND, a delay unit, characterized in that, in order to expand the scope by providing automatic change of the expansion coefficient, a counter is introduced into it, you a reading counter, a comparison unit, a second decoder, an inverter, a second trigger, a third and a fourth AND element, three OR elements, the first input of the third AND element being connected to / from the output of the counting pulse generator, the second input connected to the input bus, and the output to the counting by the counter input, the inverter input is connected to the input (Nina and the first input of the first OR element, and the output to the second input of the first element and, the third input of which is connected to the direct output of the second trigger, whose inverse output is connected to the second input of the second element A, and the third input of which is connected to the generator output countable pulses, and an output coupled to a subtraction input of down counter, a first input of a fourth AND gate connected to the output of the first decrypts the torus, a second input coupled to an output of the first flip-flop, and an output - to a first ^one input of the third OR element and with the second input of the first OR element, the output of which is connected to a single input d of the second trigger, the zero input of which is connected to the output of the second OR element, the first and second inputs of the comparison unit are connected respectively to counter output and output. a reverse counter, and the output with - the first input of the second and second input C of the third OR element, while the output of the third OR element is connected to the first input of the subtracting counter, the second input of which is connected to the write bus, and the output to the input of the second decoder ,, output which is connected to the zero input of the first trigger and the input of the delay unit, the output of which is connected to the second input of the second OR element and to the inputs of setting the reversible counter and counter to the zero state.