SU1037295A1 - Graphic data reading device - Google Patents

Abstract

1. DEVICE FOR READING GRAPHIC INFORMATION, containing-. The first trigger, whose inputs are connected to the first delay element, whose input is the first input of the device, and the first OR element, one output of which is the second input of the device, and the other connected to the frame counter, and the output of the first trigger connected to one input the first element And, the other input of which is connected to the clock pulse generator, and with the signal conditioner, the output of which is connected to one of the indicator inputs, the other inputs of which are connected to the beam deflection units, the first switchboard connected to the outputs of the first element I. and the second trigger, one input of which is the first input of the device, and one input of the second and third switches, the other inputs of which are connected to the third trigger, one input of which is the first input of the device, and the outputs of the second and third switches are connected to the same inputs of the row and frame counters, respectively. Other inputs of which are the first input of the device, and the outputs are connected to the first and second inputs of the memory block, the third input of which is the third input of the device, the first comparison block connected to the row counter and the inverter connected to the frame counter, the second block comparison, connected to the output of the first trigger, with counters. lines and frames, with another input of the third trigger and one input of the second OR element, the output of which is connected to another input of the second trigger, the first pulse selector and the second delay element, which, in order to simplify the device, contains the second selector pulses, one input of which is the first input of the device, the other is connected to the output of the first comparison unit, and the outputs of the second selector are connected to the first pulse selector and, to the other input of the second element OR, at the same time, the second element delays connected to the third input of the second OR element and to the first pulse selector, whose input is connected to the output of the first AND element 2. The device according to claim 1, characterized in that the second pulse selector comprises a fourth trigger, whose inputs are the inputs of the block and the outputs are connected to one input of the second and third elements AND, the other inputs of which are connected to the third delay element, the input of which is one of the inputs of the block, and the outputs of the second and third elements AND are the outputs of the block.

Description

The invention relates to automation and computing technology and can be used as a means of reading graphic information from photo carriers in information and information search systems for inputting it into a digital computer or for transmitting it to display devices. A device is known that contains a trigger trigger connected to the first delay element, to the first OR element, to the AND element connected to the pulse generator and to the driver, a second trigger connected to the first switch connected to the And element and to the second and third switches connected with the third trigger and, respectively, with the row counter and with the frame counter, the second delay element, the second OR element, the beam deflection blocks in the X and V coordinates, connected to the CRT connected to the driver and to the corresponding yuschim horizontal and vertical counters, coupled to the memory unit, the comparator, connected to the selector pulse t1 disadvantage of this device is its complexity. The closest to the invention to the technical essence is a device containing the first trigger, the inputs of which are connected to the first OR element and the first delay element, and the output is connected to one input of the first element, the other input of which is connected to the clock generator, and to the signal conditioner The output of which is connected with one input of the indicator, the other inputs of which are connected to the beam deflection units, the first switch connected to the first element I, with the second trigger connected to the second element that OR, and with the second and third switches connected to the third trigger and, respectively, to the row and frame counters, the outputs of which are connected to the memory unit and to the corresponding beam deflection blocks, pulse selector, the first comparison unit connected to the row counter, and through the inverter - to the frame counter; the second block is comp. Neni connected to the row and frame counters, with the first trigger, with the third trigger and with the second OR element connected to the second trigger 23.. In the known device, information is read by scanning the image in squares of various sizes. When switching from one square of scanning to another, the CRT beam is extinguished for the time required for the beam to reach the scanning start point located on the diagonal of the read frame, i.e. there is a reverse beam, which reduces the speed of the device. In addition, the device is complicated due to the presence of an additional counter (clock counter), the width of which is equal to the width of the row and frame counters, as well as the prohibition logic block and several OR elements. The purpose of the invention is to simplify the device. This goal is achieved by the fact that the device containing the first trigger, whose inputs are connected to the first delay element, whose input is the first input of the device, and the first OR element, whose one output is the second input of the device, and another to the frame counter, and the output of the first trigger is connected to one input of the first element I, the other input of which is connected to the clock pulse generator, and to the signal conditioner whose output is connected to one of the indicator inputs, the other inputs of which the first switch connected to the outputs of the first And element and the second trigger, one input of which is the first input of the device, and one input of the second and third and one input of the second and third switch, the other inputs of which are connected to the third trigger, one input of which is the first input of the device, and the outputs of the second and third switches are connected to one input of the row and frame counters, respectively, the other inputs of which are the first input of the device, and the outputs connected to the first and second inputs of the memory unit, the third input of which is the third input of the device, the first comparison unit connected to the row counter and the inverter connected to the frame counter, the second comparison unit connected to the output of the first trigger, and row counters and frames, with a different input of the third trigger and with one input — the second element OR, the output of which is connected to another input of the second trigger, the first pulse selector and W and the delay element, the second pulse selector is entered, one input It is the first input of the device, the other is connected to the output of the first comparison unit, and the outputs of the second selector are connected to the first selector, the pulses and the other input of the second OR element, while the second delay element is connected to the third inlet of the second OR element and to the first selector pulses, the input of which. connected to the output of the first element, And, the second selector of impulses contains the fourth trigger, the inputs of which are the inputs of the block, and the outputs are connected to one input of the second and third elements AND, the other inputs of which are connected to a third delay element; It is one of the inputs of the block, and the outputs of the second and third elements of AND are the outputs of the block. Figure 1 presents the block diagram of the device; FIG. 2 shows the co-implementation of the second pulse selector; Fig. 3 shows the scanning beam trajectory. The device contains a generator 1 clock pulses, the first element 2 delay, the first element ILN-3, the first element And 4, the first trigger, the first selector b of pulses, the first switch 7, the second trigger 8, the second delay element 9, the second and third switches 10 and 11, the third three waves 12, the second element OR 13, counters 14 and 15 lines and frames, the first comparison block 16, the inverter 17, the second pulse of the 18 pulses, the second comparison block 19, the beam deflection block 20 along the X coordinate, the former 21 signals, a beam deflection unit 22 along the V coordinate, a memory block 23, an indicator 24, performed n CRT, the first input 25, the second input 26 of the third input 27 and the output 28 of the device. The second selector. The 18 pulses comprise the third delay element 29, the fourth trigger 30. and the second and third elements 31 and 32. The device operates as follows. The turn-on signal, input device 25, sets the triggers B and 12 to the state O, writes the unit only to the high-order bit counters 14 and 15 lines and frames, enters the input of the delay element 2 and sets the selector 18 to its original state the As a result, the code 100, ..., O (one in the highest order), which enters the beam deflection units 20 and 21, is set at the outputs of the counters 14 and 15, according to the coordinates k, determines the deflecting current of the CRT 24, | equal to half the maximum current (maximum current corresponds to the code 111, ..., 1). Since at the initial moment the trigger 5 is in the state O, then at the output of the for- mation of 21 signals connected to the CRT modulator 24 there is an extinguishing beam (closing modulator) potential. Therefore, the extinguished beam, in accordance with the codes 10O, ..., O of the counters 14 and 15, goes to the center of the screen at point A (Fig. 3) .. The switching impulse, having passed element 2, sets the trigger 5 to the state. As a result, the shaper 21 removes the beam-blocking potential and the beam of the CRT 24 is illuminated, and the element 4 receives the resolution to pass the pulses of the generator 1 to the switch 7. The delay on the element 2 is necessary so that the beam of the CRT can go to the specified counter codes 14 and 15 point before it turned on (lit). Since the triggers 8 and 12 are in the state O, the switch 7 is connected to the switch 11, and the switches 10 and 11 are connected to the subtracting inputs (-) of the counters 14 and 15 lines and frames. Therefore, the first impulse, appearing at the output of the AND 4 element, flows through the switches 7 and 11 to the (-) input of the 15-frame counter and reduces its content by one. As a result, code 011, ... appears at the output of counter 15, and the beam moves to the & (FIG. 3), and the code 100, ..., O is set at the output of the inverter 17, and the contents of the counter 14 have not changed. Consequently, at the output of the comparator unit 16, a pulse appears, which is fed to the selector 18, designed to separate even and odd pulses. Since the first impulse received in the selector will be odd, it comes from the output of the selector. 18 through the element OR 13 to the counting input of the trigger 8 and sets it to the state. As a result, the switch 7 is connected to the switch 10, and the second pulse from the output of the element 4. Through the switches 7 and 10 enters the (-) input of the counter 14 lines and reduces its content by one. As a result, the beam moves to point B (Fig. 3), and at the output of the counter 14, a code 011, ..., is set. Since the contents of the counters 14 and 15 are equal, and the trigger 5 is in the state scientific research institute H, then a pulse appears at the output of the comparison unit 19, which arrives at the counting input of the trigger 12, and through the OR element 13 - at the counting input of the trigger 8 and changes their state to the opposite. Thus, the trigger 12 is set to state i and switches the switches 10 and 11 to the summing inputs (+) of counters 14 and 15, and the trigger 8 goes to the state O and the switch 7 is again connected to the switch 11. Another pulse from the output of the element And 4 passes through the switches 7 and 11 on the (+) input of the counter 15 frames and increases its contents by one. At the output of the counter 1b there will be a code 100, .., О and the beam will go to the point D (Fig. 3), the code 011, ... / will be set at the output of the inverter. Since the contents of the counter 14 (code 011, ...,) has not changed, then the output of the block. 16 comparisons with the second pulse, which goes to the selector 18. Since the second pulse (its number) is even, then from the output of the selector 18 it goes to the selector b of pulses, designed to separate one pulse, and sets the selector b to the initial state, i.e. allow the selection of a single-pulse from the pulse train, coming from the output of the element I 4. Therefore, the next clock pulse from the output of the element 4 will be selected by the selector bis of its output go to the delay element 9. At the same time this eye; a rare impulse from the output of the AND 4 element passes through the switches 7 and J1 to (+} the input of the counter 15 frames- hours, 1: It: 5a-its contents eadr -1l {-.-- ktsu Na the output of the counter: .5 mustache; -: .-; zlizaats code 10, ..., 01 And. ray ;; -.-. rzme1tsa. z point; 3) (fig.Z). By.:; Si; a; 1:; s by the ca. b pattern clock pulse. The output element 9 of the delay 9, which passes through the slips; 13 and, entering the account :::; entry t.riggere. 8, changes its state to the opposite. As a result, the trigger 8 is set to the state and connects KoMv yTaTo.p 7 to the commutor 10. Charger, element 9 is necessary for the clock pulse to be counted by counter 15 before than switch 7. switches. The clock pulses from the output of the element And 4 will be received through the cutters 7 and 10, to (+) The counter moves 14 lines until the contents of counters 14 and 15. do not coincide (ff, 3 , 6), As a result, the kg1 output of the unit 19 is compared with the vol. There is a second impulse, which is an em; - its state of triggers 8 and 12 to the opposite. Therefore both triggers. 8 and 12 return to connection. The described scanning process continues until 15 frames are completely unpolished with (its contents become 111 ,, ..,. And the beam moves, to point Ж (FIG. 3). state trigger 8 determines the coordinate of the sweep, and if trigger 8 is in the state, the sweep goes along the coordinate, and if it is in the state, then the X coordinate. The state of the a-trigger 12 determines the direction of the sweep and if trigger 12 This unwrapping is performed in the opposite direction 14 and 15), and if in state 1, then in the forward direction (increasing the contents of the counters 14 and 15.). During the scanning process, the beam of the CRT 24 goes to a line or point of graphical information, then at the device input 27 a video signal that rewrites the contents of the counters of 14 and 15 lines and frames to the memory block 23. From the memory block 23, the coordinates of the read information points are output to the device output 28 by signals from the devices of the graphic information. If the contents of the counter 15 will be equal 111, ..., 1, and the counter 14 000,. .., O (Fig. 3, point}, then the code 000, ..., O is set at the output of the inverter 17. On the comparison signal from block 16, the triggers 8 and 12 do not change their state to the opposite until the clock pulse selected by the selector b will not pass delay element 9. It will not go to their counting input, therefore, another clock pulse will go to (+) the input of counter 15 and cause it to overflow .3 As a result of switching the counter 15 frames from 111, ..., in the state 000, ...., A transfer pulse appears at its output, which passes through the element OR 3 and sat The trigger 5 is in the state O, and the frame reading process is completed. The device can stop the reading process at any time when the switch-off signal arrives at the device input 26, which through the OR 3 element also resets the trigger 5 to the O state and thus closes the AND element 4 for the passage of clock pulses. The pulse selector 8 operates as follows. The turn-on signal sets the trigger 30 to the state O, and the pulses from the comparator unit 16 are sent to the delay element 29 and to the trigger input of the trigger 30. Per The first pulse sets the trigger 30 to the state, therefore, element 31 opens, connected to the direct input of trigger 30. Therefore, the first pulse from the output of element 29 of the delay passes through element AND 31 to the output of the selector to element OR 13. The delay on element 29 is necessary so that trigger 30 has time to switch before the pulse arrives at elements 31 and 32. The second clock pulse changes the state of trigger 30 to the opposite, i.e. trigger 30 will be in the O state, and the AND 32 element connected to

inverse trigger output. Consequently, the second even pulse passes from the output of the delay element 29 through the element 32 to the output of the selector 18, i.e. to the selector 6. So

there is a selection of even and odd pulses by the selector 15,

The introduction of the second pulse selector has significantly simplified the device.

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Claims (2)

(54) 1. DEVICE FOR READING GRAPHIC INFORMATION, containing the first trigger, the inputs of which are connected to the first delay element, whose input ^ is the first input of the device, and the first OR element, one output of which is the second input of the device, and the other is connected to the frame counter, and the output of the first trigger is connected to one input of the first AND element, the other input of which is connected to the clock generator, and to a signal shaper, whose output is connected to one of the indicator inputs, the other inputs of which unified with the beam deflection blocks, the first switch connected to the outputs of the first element I. and the second trigger, one input of which is the first input of the device, and to one inputs of the second and third switches, the other inputs of which are connected to the third trigger, one input of which is a first input device, and the outputs of the second and third switches are connected to one input of the counter lines and frames, respectively, other inputs of which are the first input device, and outputs connected to first and second inputs of block ⁴ memory, a third input of which is a third input device; the first comparison unit connected to the line counter and the inverter connected to the frame counter, the second comparison unit connected to the output of the first trigger, with the counter-. kami lines of frames, with another input of the third trigger and with one input of the second OR element, the output of which is connected to another input of the second trigger, the first pulse selector and the second delay element, characterized in that, in order to simplify the device, it contains a second selector pulses. one input of which is the first input of the device, the other is connected to the output of the first comparison unit, and the outputs of the second selector are connected to the first pulse selector and to the other input of the second OR element, while the second delay element is connected to the third input of the second OR element and to the first selector pulses, the input of which is connected _t to the output of the first element I. 2. The device according to π. 1, characterized in that the second pulse selector contains a fourth trigger, the inputs of which are the inputs of the block, and the outputs are connected to one of the inputs of the second and third elements And, the other inputs of which are connected to the third delay element, the input of which is one of the inputs of the block, and the outputs the second and third elements And are the outputs of the block.