SU1020958A1 - Method of controlling group of pulse converter - Google Patents

Abstract

1. METHOD OF CONTROL OF A GROUP OF PULSE CONVERTERS, which consists in the fact that dp of each converter form a feedback signal in the power unit. the transducer and the reference signal determine their difference, integrate this difference up to the conode of each pulse, and form the output control signal in accordance with the transducer and feed it to the thyristors, characterized in that, in order to increase the quality. shdkhodnogo voltage by reduced; NIN Oscillations of a regulated value and an increase in the energy indices of a group in transient modes, compare the results of interchange, form a priority turn-on signal of one. The converter with the highest value of the result obtained, and if several converters are equal, the priority signal from one converter is formed in accordance with the sequence numbers of all the converters, the specified integration results are summed, ruled and compared the resulting bag with the threshold value, with a non-negative value of the comparison result, form the enable resolution signal, when coincided with the priority signal, the specified control output signal is formed they are converted by the converter and subtracted from the result of the integration, and when receiving a negative value of the comparison result W, the formation of the output control signals of all the converters irrespective of the presence of the priority signal of one converter is detected. 2, the method of claim 1, wherein and with the fact that an output signal will control the converter as the feedback signal. 3, the method according to claim 1, of which there is a signal with a regulated load value as the signal 1C or 6 times. SP 00

Description

The invention relates to electrical engineering and is intended to control thyristor impulse transducers of alternating voltage in their group application, for example, for heating installations. A known method of controlling a single impulse converter, which generates a reference signal and feedback from the input of the power circuit of the converter, determines their difference, integrates this difference until the end of the pulse period (period or half-period of the voltage of the power supply network), compares the result of integration with the threshold value , with a non-negative (i.e., a positive TCH1I zero) result of this comparison, generate a control signal at the input of the power circuit of the converter. At this switching on of the converter occurs several times during the variable period of voltage recurrence at the output of the converter, high voltage quality and the greatest fluctuations of the adjustable value (for example, temperature) are provided. - 1. The disadvantage of the method is low energy indicators for group use. converters. The closest technical solution to the proposal is a method of controlling a group of pulse converters by alternately-sequential switching on subsequent converters when disconnecting the previous ones through one line of mutual submission, before which for each converter generate feedback signals from the power section of the converter and assignment their difference, integrate this difference to the end of each pulse period, summarize the result of integration with the mutual synchronization signal A previous transducer of vzaimns line of subordination, the resulting sum is compared with a threshold value and when it is non-negative form control signals to data converter, and at otrits atelnom - mutual synchronization signal for posleduk Dego transducer through mutual submission. At the same time, in a steady-state mode, high energy indices of the entire converter group L2 J are provided. The disadvantages of this method are the low quality of the output voltage due to increased fluctuations of the controlled load and reduced energy indicators in transient modes with changes in the reference signals of individual converters. The purpose of the invention is to improve the quality of voltage by reducing fluctuations in the regulated value and increasing the energy performance of the group in transient conditions. This goal is achieved by the method of controlling a group of pulse converters, in which for each converter a feedback signal is generated in the power section of the converter and a reference signal, their difference is determined, this difference is integrated to the end of each pulse, the corresponding control signal output signal and submit it to the thyristors, compare the results. integrating, form the priority signal for switching on one converter with the highest value of the result, and if they are equal for several converters, the priority signal for one converter is formed in accordance with the sequence numbers of all converters, summarize the specified integration results and compare the resulting sum with the threshold value, with non-negative the value of the comparison result forms the enable enable signal, if it coincides with the priority signal ormi1: comfort sig nal said output control sootvetstvukmtsim converter and subtracted from the result of the integration, and obtaining LIS negative value comparison result output zaprescheaot forming control signals is not dependent on the presence fioritetnogo signal incorporating a transducer. In addition, the output signal of the converter control is used as a feedback signal, and the signal of a controlled load value is used as a feedback signal. With the proposed method, there is no predetermined line of mutual subordination of converters to each other. At the end of each pulse period, the newly determined QSCH mutual gains of all the transducers, depending on the magnitude of the integral of the difference (error integral), are higher with higher priority values when switching on, which prevents the accumulation of the maximum for the whole voltage control group. The number of converters included in the next 6 period with the highest priority values is strictly determined. The number depends on the sum of the reference signals for the entire group, which defines the total average energy consumption of all converters and, therefore, the number of switched converters with the sum of instantaneous powers at the level of total average consumption. FIG. 1 1 shows the scheme of the device for implementing one of the variants of the method of the formula; in fig. 2 and 3 is a diagram of operation signals of the device according to FIG. Ij in FIG. 4 shows an ojoeMa device of the Dn implementation of another of the variations of the method} in FIG. 5 is a diagram of operation signals of the device according to FIG. 1 | in fig. 6 is a diagram of a logic device for generating a priority signal for turning on only one converter Device For implementing the method (Fig. 1.4) consists of an arbitrary number of converters j conventionally numbered with letters of the Latin alphabet from A to Z The corresponding letters are used to index the same variables in the converters . The power part of each transformer consists of counter-switched valves 1 in the load circuit 2, which are powered from the same network. The control steps (Figs. 1, 4) of the converters are different, but the real way is the same. The control circuit (Fig. 1) contains in each converter a master block 3; a network clock generator, accumulating adder 5 (performs the integration function in DY-4FOVA form) with static summing and and 1 chip inputs and corresponding dynamic clock inputs, driver 6; pulses with a control in the dynamic clock inputs and internal memory with its dynamic output, while the output of the master unit 3 is connected to the static cigarette y, in the output of the gyrator 4 - to the two clock input of the adder, the subtraction inputs of the adder are combined with each other and the dynamic input shaper 6, the static outputs of which I are connected to the valve control valves. A common adder 7 has been entered for the entire group of converters (Fig. 1), these are: a network controlled generator of 8 clock pulses, a logical block 9 of comparison of many variables with the same number of inputs and outputs, each output corresponding (for example The number B of the Latin designation) of the accumulating adder of the corresponding converter (i.e. B) is combined with the corresponding (i.e. B) common common input and with the corresponding (i.e. B) input of the comparison unit 9, each corresponding (marked F (B) in Fig. 1, 6) output block 9 is connected to the corresponding (i.e., B) input of the imaging unit 6, the outputs of the high-order bits of the common adder are connected to the control inputs of the generator 8, the output of which is combined with the dynamic clock inputs of all the drivers 6. The control circuit (Fig. 4) contains each transducer is functionally sequentially plugged into the forward channel master bp (f l6, first summing element 11, low pass filter 12, which is an integrator, but in general, a dynamic link with transfer function V / (P), second summation elements NT 13, relay element 14 with a driver, pulses and controlled valves in the load circuit; and in the feedback channel (a variable-size sensor 15, the output of which is connected to the subtracting input of the first summing element in B not channels), a clocked analog-to-digital converter whose iformashunny input is connected to the output of the low-pass filter. For the entire group of converters (Fig. 4), a common adder 17, a clock-synchronized generator 18 of clock pulses and a controlled block 19 compared 1 many variables with the same number of information (denoted by D in Fig. 4) inputs and outputs, as well as control loop (indicated by the letter V in FIG. 4) and clock inputs, where each output of the corresponding (for example, converter B) analog-digital converter 16 is combined with the corresponding (i.e. B) input 19, the corresponding (i.e.) output which is connected to the input Each second (i.e., B) of the second summing element of the converter (i.e., B), the outputs of the high-order bits of the common adder, are connected to the control inputs of block 19, the clock input of block 19 is connected; to the output of the generator 18, the other output of which is combined with clock inputs of all analog-to-digital converters 16. A logical Spock 9 comparison of variables represented by an M-bit binary code (FIG. 6, and the code for variable B has the form B-, B, BQ) consists of latch 20 older bits with M-1 outputs, performed on the Mi element x 21 Comparison with N inputs and elements AND 22: K-1-INPUT OR OR-NOT 23 elements of no more than three input elements AND 24 and M-1-INPUT optional input elements OR 25, of which the first with output P has an additional input with additional And 26 in its circuit, as well as OR-NOT elements with the number of inputs from 1 (inverter) to Y-1. The inputs of block 9 are connected to the inputs of the OR-NOT elements and the upper inputs of the three-input AND elements (only for the additional element AND input is connected via the inverter 28), the outputs of which are connected to the inputs of the output OR elements. To the lower inputs, three-input elements AND are connected to the output of the elements OR NOT, and to the middle - the outputs of the clamp 20. When implementing the control method on PP. 1 and 2 formulas of block 3 (fig, 1) are given job signals in the form of codes that define the required value of the duty cycle of the load current pulses of each converter, for example, for a group of five converters (A, B, E) Table 1 gives random values. The block codes are sent to the static inputs of the summation of the accumulation of wooh bags 5, where they are added along each pulse of the generator 4, this corresponds to operations with the previously accumulated amount, which corresponds to the integration operation for analog signals, the Tactical pulse arrives once in the network voltage period, the numbers These network periods and cumulative amounts are shown in Table. 1. The process of increasing the accumulated amount can be graphically interpreted as a straight line at an angle of 4,. (Fig, 2 and a). In the scheme (Fig. 1), a special block 9 is applied, which generates a signal only at its one output, which corresponds to the vacancy {1st filed with the code with the largest accumulation of accumulated sums. For example, at the end of the first period of work according to the tabo. The 1 njMi priority signal is initially generated at the output F of block 9, since the accumulated amount of 0.7 is maximum for the whole group. If the accumulated sums are equal, the priority is determined in accordance with the previously nominally adopted numbering of the converters, in the example A, B, ..., E. E. In the table, 1 after summing up in the fifth period, the converters are arranged in order of precedence: D, A, B, C, E, and the priority signal is initially generated at the output Rd of block 9, Converter A will have lower priority, although the accumulated sums of the remaining converters are equal. The signal at the output of the common adder 7 (FIG. 1) determines the total sum of all accumulated sums (shown below in Table 1) and by its value the number of converters to be included in the next period is determined sequentially. In the example (FIG. 1), only the outputs of the higher order bits, the presence, are used; KOTOpibJX says that the total amount is greater than or equal to one or, which is the same, the result of comparing the total amount with one (threshold for example) is positive or zero, i.e. non-negative. When, at the output of the common torus 7, a signal about a non-negative comparison result is added, the generator 8 generates at its output clock pulses from the frequent & , much more networked. These pulses arrive immediately at all the clock inputs of the phon1 6 of the sensor 6, but only in one of them, to which the priority signal arrives from 9, the internal memory is switched. Simultaneously with switching on the dynamic output ETy1 of the internal memory, an impulse of feedback is formed in the atomizer 6, which is fed to the inputs of the subtraction of its accumulating sensor 5 and thus reduces its sum by. This immediately changes the total sum at the approach of the adder 7 and the output of block 9 immediately appears on the steep one, which defines the new major code. If the non-negativity signal from the output of the adder 7 is generated, then the second pulse from the genfator 8 repeats the above processes until the signal disappears. At the beginning of a random period of fsfirovatli 6, in which the internal memory is switched, fs send output control signals and turn on the controllable gates 1. The described popelyuyatny process is equivalent to non-direct determination of the number of converters included in the next period as a whole exceeding the initial total with: Umma under zero . This number is determined by the 1 kodsm of the older peloshchadnyh rats of the common adder 7. In the case of expolation, after the first period, two converters should be included according to the total sum of 2.2, and after the fifth - three (see Table 1), FIG. 2 in accordance with the table. 1 built up yes Gram Numbering of periods of grid voltage (a), voltage itself (b), currents of corresponding converters (c, ..., g) 1 4 physical interpretation of the accumulated sum of one of them (3), the total current of the group (and ). The magnitude of the selected psychological value and the initial values (the accumulated sums do not depend on the process of the group's work: and the transition process 1 quickly ends, Tak. In item 2 and on the corresponding 0th fig. 3 the threshold value is taken 3, and the initial The conditions are chosen as well. As a transient transmission method for one period. When implementing the control method according to claims 1 and 3, the formulas in the circuit (Fig. 4) from the driver unit U are analog signals, which in relative units also determine the duty cycle, dem element 11 op The difference with the output signal of the variable value sensor 15 is obtained as a result (shlyib) is fed to the INPUT of the low-pass filter 12 (integrator). The output (integral) prevents the switching threshold of the relay element 14 j and turns on controllable gates when the walls are less than the bottom and - controlling s1shmaet kshve pulses you C ode 12 filters the signal to proceed: ua is yyf fmapioynye BaTeita consist: transformation 16, which first end of each period nshf zheny network in cycles -rt-vomu pulse from the generator 18 to transform-iayipT dafrsivoy Coy and fv1ksiruyut. Ava: Che neither is the integral of the outputs of the integrators 12. In the following diagram (FIG. S) works according to the scheme (Fig. 1) according to the method. From the outputs of the converter 16, the signals are fed to the inputs of the adder 17, the higher bits of the outputs of which determine the integer excess of the sum above the coolant or the number of converters included in the next period .. 1О2

sneeze variables CJJ, I) T. have values, because if they (or one of them) are equal to O, then codes. C, D ... 88 /) When converters are defined, they are also determined by the values of the integrals on the outputs of 4 1 12, i.e. at the outputs of the converter 16. Table 3 shows the values of the corresponding integrals and sums over the periods of the network, and the letter B shows the fixation of the command for inclusion in the special period. FIG. 5 shows the corresponding table. 3 diagrams. In the circuit (Fig. 4), a U1F1B1SchemiY & IOK 19 Comparison is entered that feeds the signals at the outputs in a location that is assigned to the control code (V input V), E distributes them to the SFTs with priority according to informational inputs (inputs t)). Nahfimer, according to the table 3, in the first period, the signals at the outputs 1} and E are formed. These signals switch the corresponding relay elements 14, due to hysteresis of the stop. switched and at the beginning of the speed of the field include controlled ventilation 1. From the fahnen diagrams (Fig. 1 and 5), it was stated that the work of the group of cutting systems, but one method is cumbersome, even though the diagrams of integral sums (integrals , Fig. 1e and Fig. 4) are different. A logical block compared to Hega of many variables (. 6) forms at its output, for example, F (B) i signal 1, if either the code B (B2, B, BQ) is boged from A , B, C, ..., Z, or greater than A (with the bounds of the higher priority of the order number which is older) and bopy or equal to C, Ty, ..., 2 (priority of orvyh younger). The code B can be the largest when i, A C L ,,, .. 2j, tsmpda signals 1 at the output of the upper segment 2 in the channel are compared to the code B, at the output of the upper alement And 24, and at the output P (B), respectively, ELI to “mhda. ,,. “. 2 ,, Oh, then the analog of the main signal is forkgarueipa signal I on the middle elements, moreover, Rd is the input of the middle element And 24. the signal from the latch 2O about the equality of the first bits is also given. Finally, the comparison is only for junior codes, when the others are equal, the signal 1 is formed at the output of the AND element 24 and the signal 24 is formed, when the codes are equal, the signal from the latch 20, the values of pro1 are less than B, and if they are equal to B. Similar principles used when comparing all variables. When A B ... Z2, ... Z, ... 2o, the signal 1 forms a signal at the output of the additional element And 26, and accordingly, F (A) 1 is obtained.

Managed comparison block 19 of many variables (Fng. 4) can be based on the logical block of comparison (Fig. B) in the form of a sequential (i.e., multi-cycle action) auto-4a4, in which the first senior code and this is fixed in the memory cell. In Tagor's clock cycle, the output control signal, those, is subtracted from the input variable of the found higher code. 1, and the code itself is determined again (i.e., by CTajHimHcr), etc.

When the number E of the codes thus entered coincides with the required value of the number of detected variables at the control input V of block 19, the process stops and the output of block 19 will be the number of units that match the converters with the highest values priorities.

Thus, the proposed method can be applied in various devices for controlling groups of HbiX transducers and provides simultaneously extremely high indices both in terms of energy indicators of the entire group in transient conditions, Tait and in the quality of voltage and fluctuations in the adjustable 1: value of each transducer separately .

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Claims (3)

1. METHOD OF CONTROL OF A GROUP OF PULSE CONVERTERS, consisting in the fact that a feedback signal is generated for each converter, the power signal of the converter and the reference signal are determined, their difference is determined, this difference is integrated to the end of each pulse, the control output signal of the corresponding converter is generated and supply it to thyristors, with the fact that, in order to improve the quality of the output voltage by decreasing -. oscillations of an adjustable magnitude and increased energy indices of the group in transient conditions, compare the results of integration, form a priority signal for switching on one. of the converter with the highest value of the result obtained, and if they are equal for several converters, the priority signal for one converter is formed in accordance with the serial numbers of all converters, the indicated integration results are summarized and the resulting amount is compared with the threshold value, and a signal is generated with a non-negative value of the comparison result enable enable, upon coincidence of which with the priority signal form the specified control output signal corresponding the converter and subtract it from the integration result, and when a negative value of the comparison result is obtained, the formation of the control output signals of all converters is prohibited, regardless of the presence of a priority switching signal for one converter. 2. The method according to p. ^ Characterized in that the output control signal of the converter is used as a feedback signal. 3. The method according to p. ^ Characterized in that as a feedback signal using a signal of adjustable magnitude of the load.