SU1007104A1 - Random number sensor - Google Patents

Abstract

1. A RANDOM NUMBER SENSOR containing a generator of uniformly distributed random numbers, the output of which is connected to the first inputs of a Krupp comparison unit, the second inputs of which are connected to the corresponding outputs of the assignment function of the distribution function, a memory register whose output is a sensor output, characterized in that In order to simplify the sensor, it contains an address setting block, an encoder, three AND elements and a clock pulse generator, the output of which is connected to the generator input of uniformly distributed random numbers. And with the first inputs of the first and second elements And, the second inputs of which are connected to the output of the third element And whose inputs are connected to the first outputs of the group comparison units, respectively, the second outputs of which are connected to the corresponding inputs of the encoder, the output of which is connected to the information input of the memory register whose synchronizing input is connected to the output of the first element I, to the third inputs of the group comparison units and to the first input of the address setting unit, the second input of which is connected to the output second And, and the output of the address setting unit is connected to the input of the distribution function setting unit. 2. The sensor according to claim 1, characterized by the fact that each comparison block contains two AND elements (About two triggers and an OR element, the output of which is the first output of the block, the second output of which is the output of the first trigger, connected to the first input of the OR element, the second input of which is connected to the output of the second trigger and to the first input of the first element AND whose output is connected to the single input of the first trigger, the zero input of which is combined with the zero input of the second trigger, the output of the second element AND is connected with single the second input of the first element I is connected to the first input of the second element I and is the first input of the block, the third input of the first element I is connected to the second input of the second element I and the second input of the block, the third 1M input of which is the zero input of the first trigger.

Description

11 The invention relates to computing and can be used in simulating random processes. Especially effectively, such devices can be used to solve problems in the study of complex systems when creating test equipment that is part of stochastic modeling and computing complexes. At the output of such equipment, it is required to obtain up to several tens of streams of random variables (numbers) supplied to the test object. . Effective sensors of random numbers and as a specialized external device in a computer. One of the promising directions in the creation of random number sensors is the development of fundamentally new circuit solutions that will significantly simplify the device and increase the efficiency of the functioning of new developments in comparison with the known ones. A known random number sensor is constructed on the basis of a controlled probabilistic converter, which contains a memory block, a shift register, a probability (1, h) pole, a control unit, pulse generators, counters, triggers, AND and OR 1 elements. This sensor, which implements a sequential recurrent method of generating random numbers, has a relatively low speed proportional to the mathematical expectation of the generated number, which limits its applicability. The most high-speed sensors are random numbers that implement the minimax transformation method, which, in particular, consists in selecting the first of the events in a group of streams of random events. These sensors contain as the basic elements the device distribution functions, random event flow generators, logical blocks for selecting the first event, a decoder, a register and a number of additional blocks for controlling the C2 3 tests. The disadvantage of these sensors is their considerable complexity, due to the large number of random event generators (according to the number of quantiles 1. 2). The closest technical solution to the offer is a controlled random number sensor containing an equal number sensor, a pa function input device. limit1, parallel number comparison circuits and output devices, for example, registers, the comparison circuits being connected to logical blocks including one trigger and an AND element each, so that the output of each of Comparison is connected to a single trigger input, a single output of which is connected to the first input of the element I, the second input of which is connected to the zero output of the trigger of the subsequent logic block, and the outputs of the elements AND are connected to the outputs of the corresponding logic blocks connected to the output devices 33 This is due to the presence of a multi-bit sensor of equal numbers and a large number (by the number) of quantiles of parallel comparison circuits of multi-digit numbers. The aim of the invention is to simplify a random number sensor. This goal is achieved by the fact that a random number generator containing a generator of uniformly distributed random numbers, the output of which is connected to the first inputs of the group comparison units, echo the inputs of which are connected to the corresponding outputs of the distribution function setting unit, the memory register whose output is the output of the sensor , an address setting block, an encoder, three AND elements and a clock pulse generator, the output of which is connected to the input of a generator of uniformly distributed random numbers and with the first inputs of the first first and second elements And, the second inputs of which are connected to the output of the third element And, the inputs of which are connected to the first outputs of the group comparison units, respectively, the blind outputs of which are connected to the corresponding inputs of the encoder, the output of which is connected to the information input of the memory register, the synchronizing input of which is connected with the output of the first element I, with the third inputs of the group comparison units and with the first input of the address setting block, the second input of which is connected to the output of the second element I, and the output of the block specifies No address is connected to the input of the assignment block of the distribution function. In addition, each comparison block contains two AND elements, two triggers and an OR element, the output of which is the first output of the block whose second output is the output of the first trigger connected to the first input of the OR element, the second input of which is connected to the output of the second trigger and to the first input of the first element I, whose output is connected to the single input of the first trigger, the zero input of which is combined with the zero input of the second trigger, the output of the second element I connected to the single input of the second trigger, the second input Vågå elements TA and connected to the first input of the second AND gate and is the first input unit, third input of the first AND element is connected to the second input of the second AND gate and the second input is the third input of which is the zero input of the first flip-flop. The drawing shows a block diagram of the device. The random number sensor contains a generator 1 of uniformly distributed random numbers, a block 2 specifying a distribution function, blocks 3-j, 3 | g, a comparison, a block t specifying an address generator 5 clock pulses, a third element And 6, a first 7 and a second 8 elements And the encoder 9 and the memory register 10, the block 2 setting the function of the EDGE includes 1 elements 1, ..., 11 (s | memory with a bit addressable sample, and each unit 3 of the comparison is the first 12-1 and the second 122. triggers, element 3, element AND l, element OR 15. Generator 1 uniformly distributed random numbers The primary random numbers used to obtain the output random numbers distributed according to the required law are defined. Block 2 of the assignment function serves for storing and issuing the probability codes of the corresponding quantile of the distribution function. Blocks 3. J 3 (C carry the comparison of the primary random numbers, generated by generator 1, with the probability values of the distribution functions, coming from the outputs of block | 2; Block 4 of the address assignment is designed to determine the next-bit address of each of the codes; The functions of the distribution function stored in block 2. The 5-clock pulse generator ensures synchronous operation of all the random number sensor nodes. The IB element determines the end of the operation of comparing the bits of the primary random number with the corresponding bits of the probability codes of the distribution function and allowing the generation of the generated random number distributed according to the required law to the output of the random number sensor. Element And 7 generates a signal that permits the issuance of the generated random number at the output of the device and prepares the necessary ones. device blocks to the formation of the next random number. Element AND 8 generates a signal that determines the address of the next bits of the probability codes 4) of the distribution function to perform the comparison operation. The encoder 9 generates an output random number distributed according to the required law. Memory register 10 serves as a buffer device storing the output random number until a signal is received allowing it to be output to the output of the random number sensor. Elements 11 ,. .., 11 m of a memory with a bit-by-bit addressable sample are used for storing and issuing, on request, an address selection block k of one of the bits of the corresponding probability codes of the distribution function. The first and second 122 triggers, the elements AND 13 and lA, as well as the element OR 15 implement the operation of comparing the i-th bit of the primary random number with the corresponding bit of the corresponding probability code of the distribution function. The operation of the random number sensor is based on the inverse function method, which consists in comparing the primary random number generated by the generator with the probability codes of the distribution function. The output random number, distributed according to the required law, is obtained

510071

as a result of the selection of the interval in which the primary random number falls after performing the operation of its comparison with the probability codes p6b1 of the lump of the corresponding quan-5 tilas of the distribution function.

The device works as follows.

When the random number sensor is turned on, the generator 1 generates the first (senior) digit of the primary random number according to the signal of the 10th generator 5 clock pulses, which

14

enters the third inputs of all blocks 3 ,,. . , 3 (1. At the same time, the second bits of the probability codes for the corresponding quantiles of the distribution function from the corresponding outputs of block 2 are fed to the second inputs of blocks 3 (s /).

Permissible 1 / 1m that in the i-M and (1 + 1) -m elements 11 and 11 of the memory with bit-by-bit address sampling the following codes of probabilities of the play (appearance) of quantiles of the distribution function are stored:

Likelihood code stored 1011 in block 1b. Probability code stored 1 11 0 in block 1 C Primary random number b 1 1 O D e also suppose that the highest bit of the primary random number b is unity; B- 1. In this case, at the output of the AND 13 element of the 1st block 3 :: the unit signal does not appear, since the third input of the three-input element AND 13, which is inverse, receives a single signal from the third input of the 3j block. The output element And 14 also does not pass a single signal from the third input of block 3, since the first input of the element I I is inverse, a single signal is fed from the second input of the block. Similar situation occurs in the (tbi) -m block 3 Because the outputs of the elements Both 13 and 1 present a zero signal, then switching the first 12 ,. and the second 129 triggers in a single state do not occur. On the other hand, the zero signal is preserved at the output of the element And 6, The next clock pulse, developed by the generator 5 clock pulses, leads to the appearance at the output of the generator 1 of the second bit the primary random number b2 This 11OO 1 01 1 clock pulse causes passing a single signal to the output of the second element And 8, since its second input, which is inverse, receives a zero signal from the output of the element 6. The signal from the output of the second element And 8 is fed to the second input of the block, which leads to the formation in the block no address discharge next address code and corresponding probability distribution functions and quantiles issuing unit outputs them to 2. Thus, the next step starts comparing operations. Assume that the second bit of the primary random number takes on the value of one. Then, at the output of the AND 14 i block block, a single signal appears that switches the second flip-flop 12 2 to one state. The state at the output of the AND 13 element does not change, since a single signal from the third input of the block B (i + 1) -M block is received on its third (inverse) input as in the previous,. tact / 1 The next clock pulse leads to the formation in block 4 of the address address of the third bits of the probability codes of all quantiles of the distribution function and their output on the corresponding outputs of the device 2. of the input of the distribution function, as well as on the output of the third discharge generator 1 primary random number 1) 3, equal, for example, to zero. Then, at the output of the AND 13 (i + 1) -ro element of block 3. + -, a single signal appears, since a single signal from the corresponding output of block 2 arrives at its second input, a zero signal from the output of the generator 1 arrives at the third inverse input and to the first inverse input - a zero signal from the output of the second trigger 122 (switching the second trigger IZo to the unit state does not occur because the state at the output of the two-input element And 14 does not change). A single signal from the output of the element And 13 causes the switching of the first trigger 12 to a single state. The switching of the first trigger 12 i-ro of the block 3i into the single state does not occur, since the passage of a single signal on the output of the element I 13 is blocked by a single signal from the output of the second trigger 122. arriving at the first inverse input of the element AND 13 of the 1st block 3 The comparison operation continues until one of the TpVirrepoB 12 or 12 liters of each block is triggered, which means that the primary random number is greater (the second trigger 122 ) Because it is less (the first trigger is triggered 12) of the corresponding probability codes of the distribution function. After the comparison operation is completed, the single signals from the outputs of one of the triggers of each block 3-, 3, pass through the element OR 1 and arrive at the inputs of the element AND 6, W and the single signal from its output passes through the first element AND 7, leads block 4 to its original state to enable it to take 4 8 8 times the next output random number and zeroes both 12x triggers, and 122 of each block 3, f. . , 3 (M) Since the values of probability codes for drawing quantiles of the distribution function stored in elements 1C, 1,., 11 memories with bit-by-bit addressable sampling do not exceed the values of the probability code stored in element II.- memory, and the values of the probability codes stored in the memory elements 11 + 211fs | are greater than the probability code values stored in the memory element P | 4-, then the second outputs of blocks 3, ... necessarily form zero signals . The integral binary code from the second outputs of the blocks Zx |, .. (Zm comes to the inputs of the encoder 9 where about the formation of a differential binary code and the allocation of the interval in which the primary random number falls as a result of its comparison with the probability codes of the introduced distribution function is proceeded.The output random number distributed according to the required law is sent from register 10 to the output of the random number sensor, since The second input of register 10 contains an enable signal from the output of the two-input element And 7. The technical and economic efficiency of the proposed random number sensor is determined by simplifying its device, which consists in simplifying the functional blocks and reducing the number of circuit connections while maintaining a sufficiently high speed, exceeding the speed of consecutive sensors, is not much simpler than the proposed one. In addition, the possibilities of an integrated sensor are greatly expanded. Random numbers in the form of, for example, a large hybrid integrated circuit, due to the high homogeneity of the structure made on the basis of digital: element base, and the number of interconnects of the circuit, which are relatively small compared to the known devices.

Claims (2)

(5 * 0 1. RANDOM NUMBER SENSOR, comprising a uniformly distributed random number generator, the output of which is connected to the first inputs of the group comparison units, the second inputs of which are connected to the corresponding outputs of the distribution function setting unit, a memory register, the output of which is the output of the sensor, characterized in that, in order to simplify the sensor, it contains an address setting unit, an encoder, three AND elements and a clock generator, the output of which is connected to the input of the generator of uniformly distributed random numbers and the first inputs of the first and second elements And, the second inputs of which are connected to the output of the third element And, the inputs of which are connected to the first outputs of the comparison units of the group, respectively, the second outputs of which are connected to the corresponding inputs of the encoder, the output of which is connected to the information input of the memory register, the synchronizing input of which connected to the output of the first AND element, with the third inputs of the group comparison units and with the first input of the address setting unit, the second input of which is connected to the output of the second element And, and the output of the address setting unit is connected to the input of the distribution function setting unit. 2. Sensor pop. 1, wherein each comparison unit contains two AND elements, two triggers and an OR element, the output of which is the first output of the block, the second output of which * is the output of the first trigger connected to the first input of the OR element, the second the input of which is connected to the output of the second trigger and to the first 'input of the first element And, the output of which is connected to the unit input of the first trigger, the zero input of which is combined with the zero input of the second trigger, the output of the second element And is connected to the unit input of the second trigger, Torah input of the first AND element is connected to a first input of the second AND gate, and a first input unit, third input of the first AND element is connected to the second input of the second AND gate and a second input unit, third input which is the zero input of the first flip-flop. .