SU1005313A1 - Multifunction logic element - Google Patents

Description

one

The invention relates to computing, electronics and, in particular, can be used in the development of an LSI on additional MOS transistors.

A multifunctional logic element is known, the essential feature of which is the use of stepwise switching on of logic elements on additional MOS transistors Ctj.

The disadvantages of this element are the speed and distortion of logical levels with a large number of logical elements with stepwise switching., 5

A multifunctional conjunctive-inverse logical element is known that contains multi-input elements, exalted and arbitrary given logical functions, the first of which is included between the bus. power and common bus, and each subsequent one vyshodom. connected to the power supply and the other to the output of the previous multi-input logic element, and controllable elements of the restoration of the voltage level of the logical unit, in which one output is connected to the power bus, second to the output of the corresponding multi-input logic element, starting from the second, and the control output through the inverter - to the output of the previous multi-input logic element 2),

The disadvantage of the device is low speed performance due to the reloading of output capacitors through a large number of series-connected -MDP n-type transistors between the output of each multi-input logic element and the common bus.

The aim of the invention is to increase the speed.

To achieve this goal, a multifunctional logic element containing multiple input logic elements that perform arbitrary specified logic functions, of which is connected between the bus.

bus and common busbar, and the nocjtonyiomjtu dvor is connected to the power bus with a single pin, and controllable elements for restoring the current level of the logic unit

One pin is connected to the power bus, and the second is connected to the output of the corresponding multi-input logic element, starting from the second one, and dividing inverters are introduced, each of which has

output is connected to the second output COOT

of the corresponding multi-input logic element, starting from the second, and the input to the output of the previous multi-input logic element and to the control output of the level restoration element is the same as the logical unit of the next multi-input logic element.

The drawing shows an electrical printable diagram of a multi-pioneer logic element.

The circuit contains multi-input logic elements 1-4, which are connected to the OD1ShM output to the power bus 5. The controlled voltage recovery elements of the logic unit 6, 7 and 8 are connected by one output to the power bus 5 and by others to the output of the corresponding multi-input logic element , starting from the second, namely, to the output of elements 2, 3 and 4, the control output of the elements 6, 7 and 8 is connected, respectively, to the output of elements I, 2 and

3. The inputs of the additionally inserted splitter inverters 9-12 are connected, respectively, to the outputs of elements 1-4 and to the terminals of the control elements

6, 7, and 8, and the outputs of the inverters 9-12, which at the same time are the outputs of the multifunctional logic element 13-16, are connected, respectively, to the second output of the elements 2, 3 and

4. The second output of the element I is connected to the common bus 17. The capacitance s of the agruack, taking into account the parasitic capacitances, is represented by capacitors 18-26 connected between the input of the separating inverters 9-12 and the common bus 17 and between the output of these inverters and the common bus 17,

The device works as follows. „

At the output of multi-input logic elements, if they are connected between the pnashi bus and the common pshnaya, vpolshpots funktshsh), (/ 1), ..... Each of these functions can be any inhibited function of any number of logical variables X, the equivalent input signal of each multi-input logic element is equal to the inversion of the corresponding function and, r, e. Pa GDP F (Q), F (-) (i) respectively.

IF designate functions performed at the outputs of the multifunctional: logic element, respectively,

(0) (1) (i) it is easy to show that the following recurrent formula is proved:

orlo) ° OrVi) (iP since f (Q,, Fj) - .t F) is any given function, it is possible to realize a wide range of output functions of a lot of functional logic element.

Elements 6-8 of restoring the voltage level of a logical unit connect the output of each subsequent multi-input element to the power bus at the moment when the voltage level of the logical zero is set at the output of the previous element. This ensures the establishment of the voltage level of the logical unit at the output of the subsequent element. For example, a p-channel transistor can be used as an element for restoring the level of the logical unit.

The voltage level of the logic unit at the output of the multi-input logic element 2 is set either through the group of p-to anal transistors of this element, or through the voltage-level element 6 of the logic unit, and the voltage level of the logical zero is set at the discharge of parasitic capacitance through the group of n-channel transistors of this element and through the n-channel transistor of the inverter.

The performance of the multifunctional logic element increases, since with increasing functional complexity, the length of the capacitance discharge circuit at any output of many input logic elements is determined by the group of n-channel transistors of the element and the host inverter, in contrast to the known device, where the number of stages increases the capacitor discharge circuit and, consequently, the speed is reduced.

Claims (2)

Invention Formula A multifunctional logic element, containing multiple input logic1: 0 elements that perform arbitrary specified logical functions, the first of which is connected between the power bus and the common bus, and each subsequent output is connected to the power bus, controllable elements of the logic voltage level recovery. units, in which one output is connected to the power bus, and the other to the output of the corresponding multi-input logic element starting from the second one, which differs from the fact that, with a speed boost circuit, But dividing inverters are introduced, each of which has a 13 "output connected to a different output of the corresponding logic element, starting from the second, and the input to the output of the previous multi-input logic element and to the output of the control of the level recovery level of the logical ESPOT of the subsequent Inverse input . Sources of information taken into account in the examination 1. USSR author's certificate number 656213, cl. N OZ K 19/08, 1977. 2. USSR author's certificate N9 736377, cl. H 03 K t9 / O8, 1978. 13 17