SG93907A1 - Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-gate eeprom - Google Patents
Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-gate eepromInfo
- Publication number
- SG93907A1 SG93907A1 SG200006571A SG200006571A SG93907A1 SG 93907 A1 SG93907 A1 SG 93907A1 SG 200006571 A SG200006571 A SG 200006571A SG 200006571 A SG200006571 A SG 200006571A SG 93907 A1 SG93907 A1 SG 93907A1
- Authority
- SG
- Singapore
- Prior art keywords
- gate
- split
- memory cell
- threshold voltage
- voltage control
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66537—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a self aligned punch through stopper or threshold implant under the gate region
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US43972199A | 1999-11-12 | 1999-11-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
SG93907A1 true SG93907A1 (en) | 2003-01-21 |
Family
ID=23745860
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200006571A SG93907A1 (en) | 1999-11-12 | 2000-11-13 | Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-gate eeprom |
Country Status (4)
Country | Link |
---|---|
KR (1) | KR100476025B1 (en) |
CN (1) | CN1309426A (en) |
SG (1) | SG93907A1 (en) |
TW (1) | TW472388B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104538361B (en) * | 2014-12-25 | 2017-08-25 | 上海华虹宏力半导体制造有限公司 | The method for controlling flash cell threshold voltage |
CN104538364B (en) * | 2014-12-25 | 2018-01-26 | 上海华虹宏力半导体制造有限公司 | The method of stable flash cell wordline threshold voltage |
CN112614841A (en) * | 2020-12-16 | 2021-04-06 | 上海华力微电子有限公司 | Split gate flash memory cell |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998029907A2 (en) * | 1997-01-02 | 1998-07-09 | Caywood John M | Low voltage single supply cmos electrically erasable read-only memory |
US5836772A (en) * | 1994-09-29 | 1998-11-17 | Macronix International Co., Ltd. | Interpoly dielectric process |
US5856221A (en) * | 1995-06-30 | 1999-01-05 | Sgs Thomson Microelectronics | Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59114869A (en) * | 1982-12-21 | 1984-07-03 | Nec Corp | Non-volatile semiconductor memory device having floating gate of polycrystalline silicon |
JPH02205361A (en) * | 1989-02-04 | 1990-08-15 | Oki Electric Ind Co Ltd | Nonvolatile semiconductor device |
KR100187748B1 (en) * | 1989-06-02 | 1999-06-01 | 윌리엄 비. 켐플러 | Electrically-erasable, electrically-programmable read-only memory cell and method of making thereof |
EP0463511B1 (en) * | 1990-06-28 | 1999-03-24 | National Semiconductor Corporation | Method of producing a split gate EPROM cell using polysilicon spacers |
JP3109379B2 (en) * | 1993-05-11 | 2000-11-13 | 日本鋼管株式会社 | Nonvolatile memory cell, method of adjusting threshold value of transistor, method of adjusting threshold value of transistor, nonvolatile memory device, and operation method thereof |
US6432761B1 (en) * | 1999-10-01 | 2002-08-13 | Microchip Technology Incorporated | Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-EEPROM |
-
2000
- 2000-11-12 CN CN00136964A patent/CN1309426A/en active Pending
- 2000-11-13 SG SG200006571A patent/SG93907A1/en unknown
- 2000-11-13 KR KR10-2000-0067250A patent/KR100476025B1/en active IP Right Grant
- 2000-11-17 TW TW089123837A patent/TW472388B/en not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5836772A (en) * | 1994-09-29 | 1998-11-17 | Macronix International Co., Ltd. | Interpoly dielectric process |
US5856221A (en) * | 1995-06-30 | 1999-01-05 | Sgs Thomson Microelectronics | Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC |
WO1998029907A2 (en) * | 1997-01-02 | 1998-07-09 | Caywood John M | Low voltage single supply cmos electrically erasable read-only memory |
Also Published As
Publication number | Publication date |
---|---|
CN1309426A (en) | 2001-08-22 |
KR100476025B1 (en) | 2005-03-10 |
KR20010070213A (en) | 2001-07-25 |
TW472388B (en) | 2002-01-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU3124700A (en) | Floating gate memory apparatus and method for selected programming thereof | |
AU2003256994A1 (en) | Method of apparatus for preventing overtunneling in pfet-based nonvolatile memory cells | |
IL152465A0 (en) | Method for erasing a memory cell | |
SG47058A1 (en) | Circuitry and method for selecting a drain programming voltage for a nonvolatile memory | |
AU2002251705A1 (en) | Method of reducing disturbs in non-volatile memory | |
AU6319598A (en) | Method and apparatus for verifying erasure of memory blocks within a non-volatile memory structure | |
AU4985297A (en) | Method and apparatus for improved data retention in nonvolatile memory via equalization of cell voltage levels | |
EP0646933A3 (en) | Method for programming floating-gate memory cells. | |
GB2353617B (en) | A method and apparatus for hardware block locking in a nonvolatile memory | |
GB2348995B (en) | Semiconductor memory device and related method for controlling reading and writing | |
EP0656663A3 (en) | Non-volatile semiconductor memory device and method for erasure and production thereof. | |
AU2003222282A1 (en) | A system and method for erase voltage control during multiple sector erase of a flash memory device | |
HK1033702A1 (en) | Access control method for a memory having a limited erasure frequency | |
DE69522738D1 (en) | Method and circuit for programming a floating gate memory cell | |
AU6918300A (en) | A nonvolatile memory device with a high work function floating-gate and method of fabrication | |
AU2003279478A8 (en) | Non-volatile memory cell and method of fabrication | |
EP1329896A4 (en) | Semiconductor memory and control method | |
AU8692298A (en) | Method for preventing sub-threshold leakage in flash memory cells | |
SG72776A1 (en) | Transistor transistor array method for manufacturing transistor array and nonvolatile semiconductor memory | |
SG84558A1 (en) | Split gate memory cell | |
DE69630663D1 (en) | Method for erasing an electrically programmable and erasable non-volatile memory cell | |
SG93907A1 (en) | Apparatus and method for independent threshold voltage control of memory cell and select gate in a split-gate eeprom | |
AU2001229556A1 (en) | Method and apparatus for low voltage sensing in flash memories | |
EP1575056A4 (en) | Non-volatile memory and write method thereof | |
GB9605762D0 (en) | Threshold voltage verification circuit of a non-volatile memory cell and program and erasure verification method using the same |