SG90163A1 - A signal processing circuit - Google Patents

A signal processing circuit

Info

Publication number
SG90163A1
SG90163A1 SG200005119A SG200005119A SG90163A1 SG 90163 A1 SG90163 A1 SG 90163A1 SG 200005119 A SG200005119 A SG 200005119A SG 200005119 A SG200005119 A SG 200005119A SG 90163 A1 SG90163 A1 SG 90163A1
Authority
SG
Singapore
Prior art keywords
signal processing
processing circuit
circuit
signal
processing
Prior art date
Application number
SG200005119A
Other languages
English (en)
Inventor
Michael R May
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of SG90163A1 publication Critical patent/SG90163A1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/322Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M3/368Continuously compensating for, or preventing, undesired influence of physical parameters of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators
    • H03M3/37Compensation or reduction of delay or phase error
    • H03M3/372Jitter reduction
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/50Digital/analogue converters using delta-sigma modulation as an intermediate step
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3015Structural details of digital delta-sigma modulators
    • H03M7/302Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3024Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M7/3026Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a multiple bit one
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3015Structural details of digital delta-sigma modulators
    • H03M7/3031Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3033Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
    • H03M7/304Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)
  • Picture Signal Circuits (AREA)
SG200005119A 1999-09-21 2000-09-08 A signal processing circuit SG90163A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/400,257 US6278394B1 (en) 1999-09-21 1999-09-21 Signal processing circuit and method of operation

Publications (1)

Publication Number Publication Date
SG90163A1 true SG90163A1 (en) 2002-07-23

Family

ID=23582865

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200005119A SG90163A1 (en) 1999-09-21 2000-09-08 A signal processing circuit

Country Status (5)

Country Link
US (1) US6278394B1 (enrdf_load_stackoverflow)
JP (1) JP4476459B2 (enrdf_load_stackoverflow)
CN (1) CN1196267C (enrdf_load_stackoverflow)
SG (1) SG90163A1 (enrdf_load_stackoverflow)
TW (1) TW474067B (enrdf_load_stackoverflow)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2356750B (en) * 1999-11-24 2002-12-04 Fujitsu Ltd Reducing jitter in mixed-signal circuitry
US6819725B1 (en) * 2000-08-21 2004-11-16 Pmc-Sierra, Inc. Jitter frequency shifting Δ-Σ modulated signal synchronization mapper
TW584990B (en) * 2001-05-25 2004-04-21 Endpoints Technology Corp Sigma-Delta modulation device
US7084800B2 (en) * 2003-08-19 2006-08-01 Broadcom Corporation System and method for shuffling mapping sequences
US7038607B2 (en) * 2003-08-19 2006-05-02 Broadcom Corporation Modulation circuit having improved performance in the audio band
US7593483B2 (en) * 2004-05-07 2009-09-22 Broadcom Corporation Nonlinear mapping in digital-to-analog and analog-to-digital converters
DE102005024649B4 (de) * 2005-05-25 2007-04-12 Infineon Technologies Ag Vorrichtung und Verfahren zum Messen von Jitter
DE102005026899B4 (de) * 2005-06-10 2007-02-22 Infineon Technologies Ag Kompensationsschaltung zur Takt-Jitter-Kompensation
CN101517896B (zh) * 2006-08-31 2011-11-30 松下电器产业株式会社 A/d变换器
TWI427619B (zh) * 2008-07-21 2014-02-21 Realtek Semiconductor Corp 音效混波裝置與方法
CN101789788B (zh) * 2009-01-23 2012-09-26 盛群半导体股份有限公司 模拟至数字的转换方法与装置
US8570200B2 (en) * 2011-01-20 2013-10-29 Mediatek Singapore Pte. Ltd. Continuous-time oversampled converter having enhanced immunity to noise
CN109602446B (zh) * 2018-12-07 2021-04-16 珠海医凯电子科技有限公司 数字超声倍频整序方法
CN113556121B (zh) * 2020-04-23 2024-03-29 瑞昱半导体股份有限公司 锁相回路装置与频率产生方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6137429A (en) * 1999-03-08 2000-10-24 Motorola, Inc. Circuit and method for attenuating noise in a data converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6137429A (en) * 1999-03-08 2000-10-24 Motorola, Inc. Circuit and method for attenuating noise in a data converter

Also Published As

Publication number Publication date
JP2001111429A (ja) 2001-04-20
CN1196267C (zh) 2005-04-06
CN1291003A (zh) 2001-04-11
JP4476459B2 (ja) 2010-06-09
TW474067B (en) 2002-01-21
US6278394B1 (en) 2001-08-21

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