SG77557A1 - Time multiplexing pixel frame buffer video output - Google Patents

Time multiplexing pixel frame buffer video output

Info

Publication number
SG77557A1
SG77557A1 SG1996006589A SG1996006589A SG77557A1 SG 77557 A1 SG77557 A1 SG 77557A1 SG 1996006589 A SG1996006589 A SG 1996006589A SG 1996006589 A SG1996006589 A SG 1996006589A SG 77557 A1 SG77557 A1 SG 77557A1
Authority
SG
Singapore
Prior art keywords
frame buffer
video output
time multiplexing
pixel frame
buffer video
Prior art date
Application number
SG1996006589A
Other languages
English (en)
Inventor
Michael G Levelle
Alex N Koltzoff
David C Kehlet
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of SG77557A1 publication Critical patent/SG77557A1/en

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)
SG1996006589A 1995-03-21 1996-03-20 Time multiplexing pixel frame buffer video output SG77557A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/408,272 US5696534A (en) 1995-03-21 1995-03-21 Time multiplexing pixel frame buffer video output

Publications (1)

Publication Number Publication Date
SG77557A1 true SG77557A1 (en) 2001-01-16

Family

ID=23615588

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996006589A SG77557A1 (en) 1995-03-21 1996-03-20 Time multiplexing pixel frame buffer video output

Country Status (5)

Country Link
US (1) US5696534A (ja)
EP (1) EP0734008B1 (ja)
JP (1) JP3828196B2 (ja)
DE (1) DE69629070T2 (ja)
SG (1) SG77557A1 (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6020901A (en) * 1997-06-30 2000-02-01 Sun Microsystems, Inc. Fast frame buffer system architecture for video display system
US7616200B1 (en) 1998-06-12 2009-11-10 3Dlabs Inc. Ltd. System for reducing aliasing on a display device
WO2000004484A2 (en) 1998-07-17 2000-01-27 Intergraph Corporation Wide instruction word graphics processor
WO2000004494A1 (en) 1998-07-17 2000-01-27 Intergraph Corporation Graphics processing system with multiple strip breakers
US6459453B1 (en) 1998-07-17 2002-10-01 3Dlabs Inc. Ltd. System for displaying a television signal on a computer monitor
US6476816B1 (en) 1998-07-17 2002-11-05 3Dlabs Inc. Ltd. Multi-processor graphics accelerator
US7518616B1 (en) 1998-07-17 2009-04-14 3Dlabs, Inc. Ltd. Graphics processor with texture memory allocation system
WO2000004436A1 (en) 1998-07-17 2000-01-27 Intergraph Corporation Graphics processing with transcendental function generator
WO2000004443A1 (en) 1998-07-17 2000-01-27 Intergraph Corporation Byte reordering apparatus and method
US6157393A (en) * 1998-07-17 2000-12-05 Intergraph Corporation Apparatus and method of directing graphical data to a display device
WO2000004495A1 (en) 1998-07-17 2000-01-27 Intergraph Corporation System for processing vertices from a graphics request stream
US6674440B1 (en) 1999-04-05 2004-01-06 3Dlabs, Inc., Inc. Ltd. Graphics processor for stereoscopically displaying a graphical image
US6573901B1 (en) 2000-09-25 2003-06-03 Seiko Epson Corporation Video display controller with improved half-frame buffer
US7877752B2 (en) * 2005-12-14 2011-01-25 Broadcom Corp. Method and system for efficient audio scheduling for dual-decode digital signal processor (DSP)
US20090276096A1 (en) * 2008-05-02 2009-11-05 Carrier Corporation Device and method for controlling a display using a virtual display buffer

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4704605A (en) * 1984-12-17 1987-11-03 Edelson Steven D Method and apparatus for providing anti-aliased edges in pixel-mapped computer graphics
US4827255A (en) * 1985-05-31 1989-05-02 Ascii Corporation Display control system which produces varying patterns to reduce flickering
US4769632A (en) * 1986-02-10 1988-09-06 Inmos Limited Color graphics control system
EP0316424A1 (en) * 1987-05-18 1989-05-24 Hughes Aircraft Company Raster image generator
US4894653A (en) * 1988-06-24 1990-01-16 Hughes Aircraft Company Method and apparatus for generating video signals
CA2044558C (en) * 1990-07-09 1995-06-13 David M. Smith Methods and apparatus for cymk-rgb ramdac
JPH04192828A (ja) * 1990-11-27 1992-07-13 Fujitsu Ltd ワードインタリーブ方式における同期方式
US5251298A (en) * 1991-02-25 1993-10-05 Compaq Computer Corp. Method and apparatus for auxiliary pixel color management using monomap addresses which map to color pixel addresses
US5230064A (en) * 1991-03-11 1993-07-20 Industrial Technology Research Institute High resolution graphic display organization
EP0588481A1 (en) * 1992-08-17 1994-03-23 American Microsystems, Incorporated Bond pad layouts for integrated circuit semiconductor dies and forming methods
US5392393A (en) * 1993-06-04 1995-02-21 Sun Microsystems, Inc. Architecture for a high performance three dimensional graphics accelerator
US5436641A (en) * 1994-03-03 1995-07-25 Cirrus Logic, Inc. Flexible graphics interface for multiple display modes
US5544306A (en) * 1994-05-03 1996-08-06 Sun Microsystems, Inc. Flexible dram access in a frame buffer memory and system
US5510843A (en) * 1994-09-30 1996-04-23 Cirrus Logic, Inc. Flicker reduction and size adjustment for video controller with interlaced video output

Also Published As

Publication number Publication date
JPH09106270A (ja) 1997-04-22
JP3828196B2 (ja) 2006-10-04
DE69629070D1 (de) 2003-08-21
EP0734008A1 (en) 1996-09-25
DE69629070T2 (de) 2004-04-15
US5696534A (en) 1997-12-09
EP0734008B1 (en) 2003-07-16

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