SG68018A1 - Process for treating a polished semiconductor wafer immediately after the semiconductor wafer has been polished - Google Patents

Process for treating a polished semiconductor wafer immediately after the semiconductor wafer has been polished

Info

Publication number
SG68018A1
SG68018A1 SG1998000310A SG1998000310A SG68018A1 SG 68018 A1 SG68018 A1 SG 68018A1 SG 1998000310 A SG1998000310 A SG 1998000310A SG 1998000310 A SG1998000310 A SG 1998000310A SG 68018 A1 SG68018 A1 SG 68018A1
Authority
SG
Singapore
Prior art keywords
polished
semiconductor wafer
treating
immediately
wafer immediately
Prior art date
Application number
SG1998000310A
Other languages
English (en)
Inventor
Heinrich Heinhofer
Thomas Buschhardt
Franz Mangs
Gerlinde Wensauer
Original Assignee
Wacker Siltronic Halbleitermat
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wacker Siltronic Halbleitermat filed Critical Wacker Siltronic Halbleitermat
Publication of SG68018A1 publication Critical patent/SG68018A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
SG1998000310A 1997-03-06 1998-02-11 Process for treating a polished semiconductor wafer immediately after the semiconductor wafer has been polished SG68018A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19709217A DE19709217A1 (de) 1997-03-06 1997-03-06 Verfahren zur Behandlung einer polierten Halbleiterscheibe gleich nach Abschluß einer Politur der Halbleiterscheibe

Publications (1)

Publication Number Publication Date
SG68018A1 true SG68018A1 (en) 1999-10-19

Family

ID=7822471

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1998000310A SG68018A1 (en) 1997-03-06 1998-02-11 Process for treating a polished semiconductor wafer immediately after the semiconductor wafer has been polished

Country Status (7)

Country Link
US (1) US20020187639A1 (zh)
EP (1) EP0863540A1 (zh)
JP (1) JP2923641B2 (zh)
KR (1) KR100329115B1 (zh)
DE (1) DE19709217A1 (zh)
SG (1) SG68018A1 (zh)
TW (1) TW430896B (zh)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW494502B (en) * 1998-12-09 2002-07-11 Applied Materials Inc Polishing platen rinse for controlled passivation of silicon/polysilicon surfaces
DE19922167A1 (de) 1999-05-12 2000-11-16 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe
DE19958077A1 (de) * 1999-12-02 2001-06-13 Wacker Siltronic Halbleitermat Verfahren zur beidseitigen Politur von Halbleiterscheiben
DE10004578C1 (de) * 2000-02-03 2001-07-26 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe mit polierter Kante
KR20030095589A (ko) * 2002-06-12 2003-12-24 동부전자 주식회사 반도체 소자의 제조 방법
DE10240114B4 (de) * 2002-08-30 2006-12-28 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Reduzierung eines Defektpegels nach dem chemisch mechanischen Polieren eines Kupfer enthaltenden Substrats durch Spülen des Substrats mit einer oxidierenden Lösung
DE102005034119B3 (de) * 2005-07-21 2006-12-07 Siltronic Ag Verfahren zum Bearbeiten einer Halbleiterscheibe, die in einer Aussparung einer Läuferscheibe geführt wird
KR100685735B1 (ko) * 2005-08-11 2007-02-26 삼성전자주식회사 폴리실리콘 제거용 조성물, 이를 이용한 폴리실리콘 제거방법 및 반도체 장치의 제조 방법
TWI427695B (zh) * 2009-12-17 2014-02-21 羅門哈斯電子材料有限公司 紋理化半導體基板之改良方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4050954A (en) * 1976-03-25 1977-09-27 International Business Machines Corporation Surface treatment of semiconductor substrates
JP2873310B2 (ja) * 1989-04-17 1999-03-24 住友金属工業株式会社 半導体ウェーハの研摩方法
JPH04129668A (ja) * 1990-09-18 1992-04-30 Asahi Glass Co Ltd 研磨装置及び研磨方法
EP0718873A3 (en) * 1994-12-21 1998-04-15 MEMC Electronic Materials, Inc. Cleaning process for hydrophobic silicon wafers
EP0805000A1 (en) * 1996-05-02 1997-11-05 MEMC Electronic Materials, Inc. Semiconductor wafer post-polish clean and dry method and apparatus

Also Published As

Publication number Publication date
EP0863540A1 (de) 1998-09-09
KR100329115B1 (ko) 2002-08-27
DE19709217A1 (de) 1998-09-10
KR19980079836A (ko) 1998-11-25
JPH10256197A (ja) 1998-09-25
JP2923641B2 (ja) 1999-07-26
US20020187639A1 (en) 2002-12-12
TW430896B (en) 2001-04-21

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