TW430896B - Process for treating a polished semiconductor wafer immediately after the semiconductor wafer has been polished - Google Patents

Process for treating a polished semiconductor wafer immediately after the semiconductor wafer has been polished

Info

Publication number
TW430896B
TW430896B TW087103098A TW87103098A TW430896B TW 430896 B TW430896 B TW 430896B TW 087103098 A TW087103098 A TW 087103098A TW 87103098 A TW87103098 A TW 87103098A TW 430896 B TW430896 B TW 430896B
Authority
TW
Taiwan
Prior art keywords
semiconductor wafer
polished
treating
immediately
treatment agent
Prior art date
Application number
TW087103098A
Other languages
English (en)
Inventor
Heinrich Hennhoefer
Thomas Buschhardt
Franz Mangs
Gerlinde Wensauer
Original Assignee
Wacker Siltronic Ges Fur Halbe
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wacker Siltronic Ges Fur Halbe filed Critical Wacker Siltronic Ges Fur Halbe
Application granted granted Critical
Publication of TW430896B publication Critical patent/TW430896B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02043Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052Wet cleaning only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625With simultaneous mechanical treatment, e.g. mechanico-chemical polishing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
TW087103098A 1997-03-06 1998-03-04 Process for treating a polished semiconductor wafer immediately after the semiconductor wafer has been polished TW430896B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19709217A DE19709217A1 (de) 1997-03-06 1997-03-06 Verfahren zur Behandlung einer polierten Halbleiterscheibe gleich nach Abschluß einer Politur der Halbleiterscheibe

Publications (1)

Publication Number Publication Date
TW430896B true TW430896B (en) 2001-04-21

Family

ID=7822471

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087103098A TW430896B (en) 1997-03-06 1998-03-04 Process for treating a polished semiconductor wafer immediately after the semiconductor wafer has been polished

Country Status (7)

Country Link
US (1) US20020187639A1 (zh)
EP (1) EP0863540A1 (zh)
JP (1) JP2923641B2 (zh)
KR (1) KR100329115B1 (zh)
DE (1) DE19709217A1 (zh)
SG (1) SG68018A1 (zh)
TW (1) TW430896B (zh)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW494502B (en) * 1998-12-09 2002-07-11 Applied Materials Inc Polishing platen rinse for controlled passivation of silicon/polysilicon surfaces
DE19922167A1 (de) * 1999-05-12 2000-11-16 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe
DE19958077A1 (de) * 1999-12-02 2001-06-13 Wacker Siltronic Halbleitermat Verfahren zur beidseitigen Politur von Halbleiterscheiben
DE10004578C1 (de) * 2000-02-03 2001-07-26 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe mit polierter Kante
KR20030095589A (ko) * 2002-06-12 2003-12-24 동부전자 주식회사 반도체 소자의 제조 방법
DE10240114B4 (de) * 2002-08-30 2006-12-28 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Reduzierung eines Defektpegels nach dem chemisch mechanischen Polieren eines Kupfer enthaltenden Substrats durch Spülen des Substrats mit einer oxidierenden Lösung
DE102005034119B3 (de) * 2005-07-21 2006-12-07 Siltronic Ag Verfahren zum Bearbeiten einer Halbleiterscheibe, die in einer Aussparung einer Läuferscheibe geführt wird
KR100685735B1 (ko) * 2005-08-11 2007-02-26 삼성전자주식회사 폴리실리콘 제거용 조성물, 이를 이용한 폴리실리콘 제거방법 및 반도체 장치의 제조 방법
JP2011205058A (ja) * 2009-12-17 2011-10-13 Rohm & Haas Electronic Materials Llc 半導体基体をテクスチャ化する改良された方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4050954A (en) * 1976-03-25 1977-09-27 International Business Machines Corporation Surface treatment of semiconductor substrates
JP2873310B2 (ja) * 1989-04-17 1999-03-24 住友金属工業株式会社 半導体ウェーハの研摩方法
JPH04129668A (ja) * 1990-09-18 1992-04-30 Asahi Glass Co Ltd 研磨装置及び研磨方法
EP0718873A3 (en) * 1994-12-21 1998-04-15 MEMC Electronic Materials, Inc. Cleaning process for hydrophobic silicon wafers
EP0805000A1 (en) * 1996-05-02 1997-11-05 MEMC Electronic Materials, Inc. Semiconductor wafer post-polish clean and dry method and apparatus

Also Published As

Publication number Publication date
JPH10256197A (ja) 1998-09-25
KR100329115B1 (ko) 2002-08-27
JP2923641B2 (ja) 1999-07-26
SG68018A1 (en) 1999-10-19
KR19980079836A (ko) 1998-11-25
US20020187639A1 (en) 2002-12-12
DE19709217A1 (de) 1998-09-10
EP0863540A1 (de) 1998-09-09

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Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees