SG53037A1 - System and method for reducing power consumption in an electronic circuit - Google Patents

System and method for reducing power consumption in an electronic circuit

Info

Publication number
SG53037A1
SG53037A1 SG1997002902A SG1997002902A SG53037A1 SG 53037 A1 SG53037 A1 SG 53037A1 SG 1997002902 A SG1997002902 A SG 1997002902A SG 1997002902 A SG1997002902 A SG 1997002902A SG 53037 A1 SG53037 A1 SG 53037A1
Authority
SG
Singapore
Prior art keywords
power consumption
electronic circuit
reducing power
reducing
electronic
Prior art date
Application number
SG1997002902A
Other languages
English (en)
Inventor
Albert J Loper
Soummya Mallick
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of SG53037A1 publication Critical patent/SG53037A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30047—Prefetch instructions; cache control instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384—Register renaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1028—Power efficiency
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
SG1997002902A 1996-10-04 1997-08-11 System and method for reducing power consumption in an electronic circuit SG53037A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/726,370 US5805907A (en) 1996-10-04 1996-10-04 System and method for reducing power consumption in an electronic circuit

Publications (1)

Publication Number Publication Date
SG53037A1 true SG53037A1 (en) 1998-09-28

Family

ID=24918330

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1997002902A SG53037A1 (en) 1996-10-04 1997-08-11 System and method for reducing power consumption in an electronic circuit

Country Status (6)

Country Link
US (1) US5805907A (zh)
JP (1) JP3177198B2 (zh)
KR (1) KR100261639B1 (zh)
CN (1) CN1157658C (zh)
GB (1) GB2317977B (zh)
SG (1) SG53037A1 (zh)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6308260B1 (en) * 1998-09-17 2001-10-23 International Business Machines Corporation Mechanism for self-initiated instruction issuing and method therefor
JP3616556B2 (ja) 1999-06-29 2005-02-02 株式会社東芝 拡張命令を処理する並列プロセッサ
US6728893B1 (en) * 2000-04-21 2004-04-27 Intel Corporation Power management system for a random number generator
US7263567B1 (en) * 2000-09-25 2007-08-28 Intel Corporation Method and apparatus for lowering the die temperature of a microprocessor and maintaining the temperature below the die burn out
US6845432B2 (en) * 2000-12-28 2005-01-18 Intel Corporation Low power cache architecture
US6826704B1 (en) * 2001-03-08 2004-11-30 Advanced Micro Devices, Inc. Microprocessor employing a performance throttling mechanism for power management
US7539878B2 (en) * 2001-09-19 2009-05-26 Freescale Semiconductor, Inc. CPU powerdown method and apparatus therefor
US7114086B2 (en) * 2002-01-04 2006-09-26 Ati Technologies, Inc. System for reduced power consumption by monitoring instruction buffer and method thereof
US7036032B2 (en) * 2002-01-04 2006-04-25 Ati Technologies, Inc. System for reduced power consumption by phase locked loop and method thereof
US7278136B2 (en) * 2002-07-09 2007-10-02 University Of Massachusetts Reducing processor energy consumption using compile-time information
US6970985B2 (en) 2002-07-09 2005-11-29 Bluerisc Inc. Statically speculative memory accessing
US6934865B2 (en) * 2002-07-09 2005-08-23 University Of Massachusetts Controlling a processor resource based on a compile-time prediction of number of instructions-per-cycle that will be executed across plural cycles by the processor
US6992675B2 (en) * 2003-02-04 2006-01-31 Ati Technologies, Inc. System for displaying video on a portable device and method thereof
US7194601B2 (en) * 2003-04-03 2007-03-20 Via-Cyrix, Inc Low-power decode circuitry and method for a processor having multiple decoders
US7360023B2 (en) * 2003-09-30 2008-04-15 Starcore, Llc Method and system for reducing power consumption in a cache memory
US20050114850A1 (en) 2003-10-29 2005-05-26 Saurabh Chheda Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control
US7996671B2 (en) 2003-11-17 2011-08-09 Bluerisc Inc. Security of program executables and microprocessors based on compiler-architecture interaction
US8607209B2 (en) 2004-02-04 2013-12-10 Bluerisc Inc. Energy-focused compiler-assisted branch prediction
US7330988B2 (en) * 2004-06-30 2008-02-12 Sun Microsystems, Inc. Method and apparatus for power throttling in a multi-thread processor
US8566568B2 (en) * 2006-08-16 2013-10-22 Qualcomm Incorporated Method and apparatus for executing processor instructions based on a dynamically alterable delay
US20080126766A1 (en) 2006-11-03 2008-05-29 Saurabh Chheda Securing microprocessors against information leakage and physical tampering
KR101390974B1 (ko) * 2008-01-30 2014-05-02 삼성전자주식회사 다중 모드를 제공하는 재구성 가능한 장치 및 방법
US8219831B2 (en) * 2009-01-28 2012-07-10 Oracle America, Inc. Reducing temperature and power by instruction throttling at decode stage of processor pipeline in time constant duration steps
US10955906B2 (en) 2019-02-07 2021-03-23 International Business Machines Corporation Multi-layered processor throttle controller

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4727491A (en) * 1984-06-27 1988-02-23 Compaq Computer Corporation Personal computer having normal and high speed execution modes
US5345569A (en) * 1991-09-20 1994-09-06 Advanced Micro Devices, Inc. Apparatus and method for resolving dependencies among a plurality of instructions within a storage device
US5452401A (en) * 1992-03-31 1995-09-19 Seiko Epson Corporation Selective power-down for high performance CPU/system
KR0122528B1 (ko) * 1993-01-08 1997-11-20 윌리엄 티.엘리스 슈퍼스칼라 프로세서 시스템에서 중간 기억 버퍼의 할당을 인덱스하기 위한 방법 및 시스템
US5465373A (en) * 1993-01-08 1995-11-07 International Business Machines Corporation Method and system for single cycle dispatch of multiple instructions in a superscalar processor system
US5420808A (en) * 1993-05-13 1995-05-30 International Business Machines Corporation Circuitry and method for reducing power consumption within an electronic circuit
WO1995016952A1 (en) * 1993-12-15 1995-06-22 Silicon Graphics Inc. Superscalar microprocessor instruction pipeline including instruction dispatch and release control
CA2157595A1 (en) * 1994-01-05 1995-07-13 William H. Keehn Safe-stop mode for a microprocessor operating in a pseudo-static random access memory environment
JP2858542B2 (ja) * 1994-06-03 1999-02-17 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピュータ用ディスク・ドライブの電力消費を節減する方法及び装置
US5494419A (en) * 1994-10-20 1996-02-27 Shu-Mu Wu Portable and flexible air pump for bicycle

Also Published As

Publication number Publication date
KR100261639B1 (ko) 2000-07-15
CN1180197A (zh) 1998-04-29
KR19980032290A (ko) 1998-07-25
JPH10124335A (ja) 1998-05-15
US5805907A (en) 1998-09-08
CN1157658C (zh) 2004-07-14
GB2317977A (en) 1998-04-08
GB9716265D0 (en) 1997-10-08
JP3177198B2 (ja) 2001-06-18
GB2317977B (en) 2001-06-27

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