SG49050A1 - A multiprocessor programmable interrupt controller system with processor-integrated interrupt controllers - Google Patents

A multiprocessor programmable interrupt controller system with processor-integrated interrupt controllers

Info

Publication number
SG49050A1
SG49050A1 SG1996005534A SG1996005534A SG49050A1 SG 49050 A1 SG49050 A1 SG 49050A1 SG 1996005534 A SG1996005534 A SG 1996005534A SG 1996005534 A SG1996005534 A SG 1996005534A SG 49050 A1 SG49050 A1 SG 49050A1
Authority
SG
Singapore
Prior art keywords
processor
controller system
integrated
interrupt
controllers
Prior art date
Application number
SG1996005534A
Other languages
English (en)
Inventor
P K Nizar
David G Carson
Adi Golbert
David Finzi
Yoav Hochberg
Original Assignee
Inter Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inter Corp filed Critical Inter Corp
Publication of SG49050A1 publication Critical patent/SG49050A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
SG1996005534A 1993-12-30 1994-12-21 A multiprocessor programmable interrupt controller system with processor-integrated interrupt controllers SG49050A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/176,122 US5495615A (en) 1990-12-21 1993-12-30 Multiprocessor interrupt controller with remote reading of interrupt control registers

Publications (1)

Publication Number Publication Date
SG49050A1 true SG49050A1 (en) 1998-05-18

Family

ID=22643068

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996005534A SG49050A1 (en) 1993-12-30 1994-12-21 A multiprocessor programmable interrupt controller system with processor-integrated interrupt controllers

Country Status (9)

Country Link
US (1) US5495615A (fr)
EP (1) EP0737336B1 (fr)
KR (1) KR100292660B1 (fr)
AU (1) AU689201B2 (fr)
CA (1) CA2179397C (fr)
DE (1) DE69429279T2 (fr)
GB (1) GB9610760D0 (fr)
SG (1) SG49050A1 (fr)
WO (1) WO1995018416A1 (fr)

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Also Published As

Publication number Publication date
EP0737336B1 (fr) 2001-11-28
DE69429279T2 (de) 2002-07-25
WO1995018416A1 (fr) 1995-07-06
KR100292660B1 (ko) 2001-09-17
EP0737336A1 (fr) 1996-10-16
CA2179397C (fr) 2001-08-21
AU1516195A (en) 1995-07-17
AU689201B2 (en) 1998-03-26
EP0737336A4 (fr) 1997-05-07
CA2179397A1 (fr) 1995-07-06
US5495615A (en) 1996-02-27
DE69429279D1 (de) 2002-01-10
GB9610760D0 (en) 1996-07-31

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