SG47466A1 - Reed-solomon decoder - Google Patents

Reed-solomon decoder

Info

Publication number
SG47466A1
SG47466A1 SG1996001928A SG1996001928A SG47466A1 SG 47466 A1 SG47466 A1 SG 47466A1 SG 1996001928 A SG1996001928 A SG 1996001928A SG 1996001928 A SG1996001928 A SG 1996001928A SG 47466 A1 SG47466 A1 SG 47466A1
Authority
SG
Singapore
Prior art keywords
reed
solomon decoder
solomon
decoder
Prior art date
Application number
SG1996001928A
Other languages
English (en)
Inventor
Christopher P Zook
Original Assignee
Cirrus Logic Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cirrus Logic Inc filed Critical Cirrus Logic Inc
Publication of SG47466A1 publication Critical patent/SG47466A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Algebra (AREA)
  • Pure & Applied Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
SG1996001928A 1993-11-04 1994-10-18 Reed-solomon decoder SG47466A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14765093A 1993-11-04 1993-11-04

Publications (1)

Publication Number Publication Date
SG47466A1 true SG47466A1 (en) 1998-04-17

Family

ID=22522365

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996001928A SG47466A1 (en) 1993-11-04 1994-10-18 Reed-solomon decoder

Country Status (6)

Country Link
US (1) US5446743A (de)
EP (1) EP0729611B1 (de)
JP (1) JPH09507117A (de)
DE (1) DE69424877T2 (de)
SG (1) SG47466A1 (de)
WO (1) WO1995012850A1 (de)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970004515B1 (ko) * 1993-12-29 1997-03-28 삼성전자 주식회사 리드-솔로몬 복호기의 오류위치다항식 연산방법 및 장치
US6125469A (en) * 1994-10-18 2000-09-26 Cirrus Logic, Inc. Error correction method and apparatus
KR0135824B1 (ko) * 1994-11-10 1998-05-15 윤종용 오류 위치 및 추정 다항식 계산방법 및 이를 이용한 리드-솔로몬 복호기
US5715262A (en) * 1995-07-12 1998-02-03 Lsi Logic Corporation Errors and erasures correcting reed-solomon decoder
US5701314A (en) * 1995-12-21 1997-12-23 Cirrus Logic, Inc. On-the-fly error correction using thermal asperity erasure pointers from a sampled amplitude read channel in a magnetic disk drive
FR2743912B1 (fr) * 1996-01-24 1998-04-10 Matra Communication Circuit de resolution d'equation-cle et decodeur reed-solomon incorporant un tel circuit
US5844919A (en) * 1996-09-16 1998-12-01 Cirrus Logic, Inc. Sector and track level error correction system for disc storage systems
US5701304A (en) * 1996-09-16 1997-12-23 Cirrus Logic, Inc. Method for correcting unrecoverable sectors using track level redundancy in a disc drive storage system
US5872800A (en) * 1996-09-16 1999-02-16 Cirrus Logic, Inc. Write verify method for correcting unrecoverable sectors in a disc storage system using track level redundancy
US5751733A (en) * 1996-09-16 1998-05-12 Cirrus Logic, Inc. Interleaved redundancy sector for correcting an unrecoverable sector in a disc storage device
GB2318954B (en) * 1996-10-29 2001-05-23 Daewoo Electronics Co Ltd Reed-solomon decoder for use in advanced television
KR100200770B1 (ko) * 1996-12-20 1999-06-15 윤종용 에러정정방법 및 장치
JPH113573A (ja) * 1997-04-15 1999-01-06 Mitsubishi Electric Corp 拡大リードソロモン符号の誤り訂正復号方法と誤り訂正復号装置、１次伸長拡大リードソロモン符号の誤り訂正方法と誤り訂正装置、および２次伸長拡大リードソロモン符号の誤り訂正方法と誤り訂正装置
US5974580A (en) * 1997-07-23 1999-10-26 Cirrus Logic, Inc. Concurrent row/column syndrome generator for a product code
US5991911A (en) * 1997-11-14 1999-11-23 Cirrus Logic, Inc. Concurrent generation of ECC error syndromes and CRC validation syndromes in a DVD storage device
US6052815A (en) * 1997-11-14 2000-04-18 Cirrus Logic, Inc. ECC system for generating a CRC syndrome over randomized data in a computer storage device
US5996105A (en) * 1997-11-14 1999-11-30 Cirrus Logic, Inc. ECC system employing a data buffer for storing codeword data and a syndrome buffer for storing error syndromes
US6047395A (en) * 1998-01-30 2000-04-04 Cirrus Logic, Inc. Error correction processor for correcting a multi-dimensional code by generating an erasure polynomial over one dimension for correcting multiple codewords in another dimension
EP0939403A3 (de) * 1998-02-25 1999-11-17 Matsushita Electric Industrial Co., Ltd. Hochgeschwindigkeits-Fehlerkorrekturvorrichtung mit effizientem Datentransfer
US6272659B1 (en) 1998-05-18 2001-08-07 Cirrus Logic, Inc. Error correction code processor employing adjustable correction power for miscorrection minimization
US6412090B1 (en) 1998-06-18 2002-06-25 Globespanvirata, Inc. Galois field computation system and method
US6415413B1 (en) 1998-06-18 2002-07-02 Globespanvirata, Inc. Configurable Reed-Solomon controller and method
US6370671B1 (en) 1998-06-18 2002-04-09 Globespan, Inc. Configurable decoder and method for decoding a reed-solomon codeword
AU1615100A (en) * 1998-11-09 2000-05-29 Broadcom Corporation Forward error corrector
US6662336B1 (en) 1999-07-06 2003-12-09 Cirrus Logic, Inc. Error correction method and apparatus
US20080282128A1 (en) * 1999-08-04 2008-11-13 Super Talent Electronics, Inc. Method of Error Correction Code on Solid State Disk to Gain Data Security and Higher Performance
JP3352659B2 (ja) * 2000-03-27 2002-12-03 松下電器産業株式会社 復号装置及び復号方法
US6694476B1 (en) * 2000-06-02 2004-02-17 Vitesse Semiconductor Corporation Reed-solomon encoder and decoder
KR100370239B1 (ko) * 2000-10-25 2003-01-29 삼성전자 주식회사 고속 블럭 파이프라인 구조의 리드-솔로몬 디코더에적용하기 위한 메모리 장치와 메모리 액세스 방법 및 그메모리 장치를 구비한 리드-솔로몬 디코더
GB2379768B (en) * 2000-10-25 2003-08-20 Samsung Electronics Co Ltd Memory device, method of accessing the memory device, and reed-solomon decoder including the memory device
US6961197B1 (en) 2001-12-28 2005-11-01 Marvell International Ltd. Correcting errors in disk drive read back signals by iterating with the Reed-Solomon decoder
US7751138B1 (en) 2001-12-28 2010-07-06 Marvell International Ltd. Correcting errors in disk drive read back signals by iterating with the Reed-Solomon decoder
US7467346B2 (en) * 2005-08-18 2008-12-16 Hitachi Global Storage Technologies Netherlands, B.V. Decoding error correction codes using a modular single recursion implementation
US7624330B2 (en) * 2005-12-12 2009-11-24 Lsi Corporation Unified memory architecture for recording applications
US7661057B2 (en) * 2006-02-01 2010-02-09 Broadcom Corporation Clocking Chien searching at different frequency than other Reed-Solomon (RS) ECC decoding functions
US7814374B2 (en) * 2007-01-19 2010-10-12 International Business Machines Corporation System and method for the capture and preservation of intermediate error state data
US8732558B1 (en) * 2007-04-25 2014-05-20 Samsung Electronics Co., Ltd. MPE-FEC system capable of selecting an FEC mode, a forward error correcting method performed in the MPE-FEC system, and an FEC mode selecting method performed in the MPE-FEC system
WO2009046534A1 (en) * 2007-10-11 2009-04-16 The Royal Institution For The Advancement Of Learning/Mcgill University Methods and apparatuses of mathematical processing
DE112011102474B4 (de) 2011-10-13 2021-08-12 Hyperstone Gmbh Hybride Dekodierung von BCH-Kodes für nichtflüchtige Speicher
US9686382B2 (en) 2014-08-04 2017-06-20 Honeywell International Inc. Double decoder system for decoding overlapping aircraft surveillance signals
TWI566096B (zh) * 2015-09-11 2017-01-11 慧榮科技股份有限公司 資料儲存系統與其相關方法

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Publication number Priority date Publication date Assignee Title
US4777635A (en) * 1986-08-08 1988-10-11 Data Systems Technology Corp. Reed-Solomon code encoder and syndrome generator circuit
US4782490A (en) * 1987-03-16 1988-11-01 Cythera Corporation Method and a system for multiple error detection and correction
US4845713A (en) * 1987-06-08 1989-07-04 Exabyte Corporation Method and apparatus for determining the coefficients of a locator polynomial
EP0496157A3 (de) * 1991-01-22 1992-08-12 International Business Machines Corporation Vorrichtung und Verfahren zur Dekodierung von algebraischen linearen Kodes
US5414719A (en) * 1992-04-24 1995-05-09 Sharp Kabushiki Kaisha Operating circuit for galois field

Also Published As

Publication number Publication date
EP0729611B1 (de) 2000-06-07
DE69424877D1 (de) 2000-07-13
EP0729611A4 (de) 1996-10-02
EP0729611A1 (de) 1996-09-04
DE69424877T2 (de) 2001-01-04
WO1995012850A1 (en) 1995-05-11
JPH09507117A (ja) 1997-07-15
US5446743A (en) 1995-08-29

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