SG193052A1 - A method for plating a component - Google Patents

A method for plating a component Download PDF

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Publication number
SG193052A1
SG193052A1 SG2012013827A SG2012013827A SG193052A1 SG 193052 A1 SG193052 A1 SG 193052A1 SG 2012013827 A SG2012013827 A SG 2012013827A SG 2012013827 A SG2012013827 A SG 2012013827A SG 193052 A1 SG193052 A1 SG 193052A1
Authority
SG
Singapore
Prior art keywords
plating
applying
leadframe
layer
connector pin
Prior art date
Application number
SG2012013827A
Inventor
Singh Paramgeet
Varanian Ravi
Original Assignee
Rokko Leadframes Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rokko Leadframes Pte Ltd filed Critical Rokko Leadframes Pte Ltd
Priority to SG2012013827A priority Critical patent/SG193052A1/en
Priority to PCT/SG2013/000073 priority patent/WO2013126018A1/en
Priority to TW102106378A priority patent/TW201341599A/en
Publication of SG193052A1 publication Critical patent/SG193052A1/en

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Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00—Electrophoretic coating characterised by the process
    • C25D13/04—Electrophoretic coating characterised by the process with organic material
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00—Electrophoretic coating characterised by the process
    • C25D13/12—Electrophoretic coating characterised by the process characterised by the article coated
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48—After-treatment of electroplated surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4835—Cleaning, e.g. removing of solder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/02—Contact members
    • H01R13/03—Contact members characterised by the material, e.g. plating, or coating materials

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

A Method for Plating a Component5 A method for selectively plating a connector pin, the method comprising the steps of:providing said connector pin; applying a layer of a barrier metal to said connector pin;applying a photo-resist material to said connector pin, then; selectively exposing a portion of the photo-resist material so as to impart a pattern on the exposed portion; removing unexposed photo-resist material; applying a layer of precious metal to the10 connector pin such that said precious metal layer is applied to the exposed portion only.Figure 1

Description

I
- : wIs9I59*
A METHOD FOR PLATING A COMPONENT CT - =
JER
Field of Invention — en
The invention relates to the manufacture of leadframes for electronic devices.
Specifically the method relates to the process of plating selective silver onto the leadframe.
Background
A leadframe is used to support and house a microelectronic device. The leadframe is typically a molded plastic member, which has a layer of copper, copper alloy or silver plated onto the member. It is characterized by being low cost, easy to assembly and provides a support to protect the device and platform for an integrated circuit chip upon which the device can be isolated from moisture.
Silver plating is applied using a fixture known as a mechanical mask. The silver solution channels from the bath into the mechanical mask using a pump and finally the solution flows to the dedicated area to be plated on the leadframes.
With a rectifier and an electrical contact to the leadframes, the leadframe will be plated to the thickness required. Currently, the market demands the area to be plated onto the leadframes be tighter as compared with previous generations of leadframes. The ‘ designated area to be plated, or have selective plating, has become almost too small to fit with the tolerances of the mechanical mask. For an example the selective plating area for the current market requires less than 0.1mm compared with 0.375mm frequently used in the past. With this type of demand the use of laminated dry film technology is used compare to mechanical mask to control the accuracy of plating within 0.025mm tolerance.
This is further demonstrated for the manufacture of connector pins. At a time when the world prices for precious metals were relatively low, it was common to merely plate the entire connector pin. As prices slowly grew, the practice didn’t change, and no significant alternatives exist.
With current precious metal prices at historical highs, including gold, it would be advantageous if a method of reducing gold were available.
Summary of Invention
In a first aspect the invention provides a method for selectively plating a connector pin, the method comprising the steps of: providing said connector pin; applying a layer of a barrier metal to said connector pin; applying a photo-resist material to said connector pin, then; selectively exposing a portion of the photo-resist material so as to impart a pattern on the exposed portion; removing unexposed photo-resist material; applying a layer of precious metal to the connector pin such that said gold layer is applied to the exposed portion only.
In a second aspect, the invention provides a method for plating a leadframe, the method comprising the steps of: providing said leadframe; applying a dry film lamination to said leadframe; exposing said leadframe so as to impart an image to said dry film; applying a metallic plating to said exposed image such that the thickness of said metallic plating is less than the thickness of the dry film lamination.
The ability to selectively control the precious metal layer on the connector pin provides significant advantage over the prior art approach of merely flooding the pin with precious metal.
When referring to precious metals, these may include gold, platinum, silver and palladium, with gold being a particularly important example. Firstly, the cost of gold has risen so dramatically during the period of 2000 to 2010, that it is no longer economically viable to use such inefficient methods. Secondly, the selective plating process may also permit a precise control over thickness and width of the gold coating, 50 as to provide an event coating and hence better connectivity, at the regions on the connector pins that require such improvement. For instance, a gold flooding method may yield a thickness of 100 microns in some portions, as the lack of thickness control requires a thick coating to ensure all parts of the pin have a minimum required thickness.
By contrast, a selective process according to the present invention may yield a consistent thickness of 5 microns with potential cost savings up to 50%.
Further, the selective process is repeatable. Should an end user wish to have consistent thickness of gold plating, but different thickness on different portions, the selective process according to the present invention may allow for multiple passes, so that each pass deposits the required thickness on the designated region. This may even allow for aunique etched pattern or “bar code” to be placed precisely on the chosen pin to better enhance tracking of the component that has been developed to protect the Intellectual
Property (IP) of the product.
The selective process may also allow highly detailed images to be imparted on the pins, which may be used for quality control, determining origin of the part or branding.
Brief Description of Drawings
It will be convenient to further describe the present invention with respect to the accompanying drawings that illustrate possible arrangements of the invention. Other arrangements of the invention are possible, and consequently the particularity of the accompanying drawings is not to be understood as superseding the generality of the preceding description of the invention.
Figure 1 is a flow chart of a plating process according top one aspect of the invention;
Figure 2 is a flow chart of a plating process according to a second aspect of the invention.
i .
Detailed Description
Figure 1 shows a flow chart for the plating of a leadframe according to one embodiment of the present invention.
The process is divided into three distinct stages of exposure 5, plating 25 and etching 80.
For the exposure stage 5, the leadframe, which may be made of copper or copper alloy, is loaded into a pre-clean process 10. This process basically uses an acid spray cleaner to remove chromate and other anti-tarnish coatings from the copper surfaces prior to a photo-resist application. The copper material is then transferred to dry film lamination process 15. Here, a negative dry film is used which is a type of photo-resist in which the portion of the photo-resist that is exposed to light becomes insoluble to the photo-resist developer.
After the lamination process 15, the laminated dry film will be transferred to exposure machine 20 where the area to be plated will be exposed using collimated light and a film/glass artwork. This process 20 may be performed in a cleanroom environment to get a good quality of exposure.
After exposure, the leadframe is then transferred to the plating stage 25, whereby the copper material will be developed 30 using a developer machine. The unexposed portion on the laminated copper will be dissolved and the space is open up for the plating. The tolerance of this method allows developing of an area less than 1 mm.
Accordingly, selective plating can be done to meet the market demand. The developed copper is then loaded to a plating machine 50.
For the embodiment of a silver plated lead frame, pretreatment is applied by using acid, anti immersion and Ag strike 35, 40, 45 as a surface preparation for silver plating. The thickness of dry film used is a key factor to get a good finishing on the plating.
A thinner dry film thickness applied with a thicker silver plating thickness will give a ‘mushroom’ effect to the silver plating finishing. The dry film thickness must always be thicker than the silver plating thickness requirement. The plating process uses a rectifier and a contact to get the copper plated. The copper basically will be fully immersed in a floodcell but the overall copper will not be plated but only the developed area will be plated. The rest of the surface are still covered with dry film.
In an alternative embodiment, the process is adapted to provide nickel, palladium and gold plating instead of silver.
Nickel is added as a barrier layer prior to the application of gold, to prevent the migration of copper into the gold layer. A process for roughening the nickel for better adhesion between the palladium and nickel, is then applied. Similar to nickel, the palladium layer further prevents migration of the copper through to the gold layer.
Whilst the electrical conductivity of silver is very high, that of gold is superior.
However, the migration issues of copper through to the gold layer require the intermediate layers of nickel and palladium, enhancing performance of the leadframe, but increasing complexity.
After the plating 50, a stripping process 55 is applied. This is another key area where the edges of the silver plated will be chamfered by using stripping process. Without the silver stripper process 55 the rough edges of silver plated can be broken into smaller chips leaving the base copper to be exposed. This will be serious defect to any customers and therefore applying silver stripper to chamfer the edges by using chemicals is essential.
After this process the post treatment applied using acid 65 and anti tarnish 70. The dry film on the copper will be removed using resist stripper 60 and only the plated silver will remain on the copper surface. The copper material now will be transferred back to pre-clean to prepare for the etching process 80. Again the process pre-clean 85 is applied to prepare the material for dry film lamination 90. After being laminated 90, the copper will be processed in an exposure station 95. A target mark is applied on the artwork, to ensure the plated area is positioned consistent with the leadframe design of the artwork. This is a key factor because the accuracy called for the positioning is precision. Any mismatch, the final etched leadframe will be half plated or is not plated atall.
After the exposure 95, the copper will be transferred to a developer station to develop out all the unexposed dry film during exposure. After that, the copper will go through etching process 100. The etching process will etch out the exposed copper after the developing process. All the etched copper will dissolve in the etchant itself, however the pieces of copper which stick to the dry film will not be able to dissolve and there will be a high possibility that this tiny pieces of copper will end up in the spray nozzles and limit the spray pressure. The filtration system of the etching is very critical because it needs a special filtration which is called 'chip separator’. The chip separator basically built using titanium material to stand the acid base etchant and it separates the tiny pieces of copper from the solution. By using a pump the etchant will be sucked into the chip separator and the process of separation will take place. After that the solution is released to the bath the spray nozzles are protected from the chips. The separation process basically, the solution sprayed onto a mesh with opening as small as 20 micron, the copper size which is more than 20 micron will be separated and channel to a basket and the solution flows back to the etchant tank. After etching the material will go through the dry film stripping process. At this stage the dry film on the copper surface will be removed and normally there will be an oxidation layer sits on the copper. This oxidation removed using an acid treatment and finally the leadframes will be coated with an anti tarnish to prevent any oxidation on the surface. The base copper already turn into plated and etched leadframe and the above process can be catered for the minimum area for plating process which market calls for.
Figure 2 shows a flow diagram for the selective plating process of a connector pin according to one aspect of the present invention.
The process involves 3 broad stages being electro deposition 140, exposure 210 and developing 220.
The connector pins undergo a pre-treatment process of electro cleaning and activation 145, 150, 155, so as to remove oil and oxidation on the surface of the connector so as to facilitate subsequent plating steps.
An important aspect of the present invention is the placement of a nickel plating 160 on the pin. This is achieved by immersing the pin in a flood cell and through use of a rectifier adding a nickel plate layer to the pin. The nickel acts as a barrier layer to prevent copper migration into the gold layer of the connector pin which, for instance, may be of a copper or a copper-alloy material. In particular the nickel barrier layer helps to improve the oxidation resistance of the base material.
Next, a selective tin layer 165 is applied over the nickel bearer layer. The tin acts to improve electrical conductivity and is placed only in the areas required to achieve better contact and conductivity. The selective nature of the placement of the tin layer is achieved through dipping rather than immersing the pins into the flood cell.
It is important to note that by using the electro deposit process for placing the gold layer, it is necessary to have the bearer layer placed prior to the electro deposit process. It will be appreciated that, whilst this method makes reference to gold, it may be applicable to a range of precious metals including silver, palladium and platinum.
As a pre-treatment for the electro deposit (ED) process, a solution of photo-resist, or ED, material is applied to the connector pin purely as a means of wetting the pin. The pins are then transferred to the electro deposit bath 175 whereupon the pins receive a full coating. The pins may be subject to vibration as they pass through the electro deposit bath so as to remove bubbles from the coating and thus providing an even coat. The coating is applied by passing a voltage across the coating cell within the electro deposit bath. Positively charged micelles migrate towards the cathode whereby the positive charge on the micelles is neutralized by hydroxide irons within the bath produced proximate to the cathode as a result of electrolysis of the water.
On losing their charge, the micelles become unstable and tend to coagulate and it is the coagulation that forms the coating on the cathode. Further application of voltage makes the coating more compact and driving out water and occluded irons by electro osmosis under a process known as coalescence.
Ongoing micelle deposition results in a decreasing current flow leading to the formation of an organic uncharged film and essentially insulating the conductive surface from further deposition. The film is therefore self-limiting in nature.
As the micelles migrate toward the cathode, the counter ions migrate in the opposite direction to the anode.
The electro deposit photo-resist process is an aqueous based positive tone of photo- resist emulsion.
Following the placement of the photo-resist coating, the pins then go through permeation stages 180, 185, so as to rinse away the photo-resist emulsion that has migrated to the cathode but has not coalesced. The permeation stages may also permit the reclamation of the photo-resist which may be extracted from the rinsing medium through filters.
A top-coat is then applied 190 which is used to prevent or limit parts sticking together during the exposure stage 210 with the top coat having the effect of freezing the photo- resist coating in place and so reduce pullback from coated edges which may subsequently lead to undermining the eventual gold plating.
In essence, the top coat is an aqueous non-toxic cellulose material designed to improve the handling properties of the coated parts particularly during the subsequent drying 195 and cooling 200 stages. The cooled and dried coated pins are then loaded 205 to the exposure stage.
Next, the UV exposure stage 210 commences. It is during this stage that the benefits of selective plating are first provided. By selecting the image or pattern of the exposure, the degree to which the gold plating will be applied to the pins is determined. Whereas the prior art merely floods the pin with gold plating, and so no control over thickness. the selective control the process of the present invention not only provides accurate control of the gold plating later, but also over the thickness of that layer.
During the exposure process 21s the top and bottom glass of the exposure is contactless in order to accommodate the carriers stamped or build in the connectors. Basically a blank artwork without any pattern is applied and by using a collimated light, the UV light source will only transfer the energy to top and bottom of the coated area. By doing so all the ED material coated at the side of the pin will be exposed but the top and bottom coat will not be exposed. When the pins are loaded to the developing phase 220, the unexposed area which is the top and bottom surface of the coated pin will be removed and the pin will be ready for the selective plating. Now the pins will be going through nickel activation in order to remove any residues left on the surface of the developed area. When the surfaced is cleaned up, the pins will be loaded to the developing stage 220.
The pins will be totally immersed in the floodcell of the gold plating 245 but the plating will only take place on the top and bottom of the pins because the ED material is coated at the side of the pins. And then all the plated pins will go the next step of resist stripping process where the coat is removed from the surface of the pins. Resist stripping is an aqueous, organic acid base liquid which, when diluted with water is used to remove the ED coated resist. After the stripping process 250, acid is used to remove the oxidation layer on the surface. Finally anti tarnish 260 will be applied to protect the connector pin surface. The connector pins at this stage is selective gold finishing on the top and bottom of the pins.

Claims (11)

Claims
1. A method for selectively plating a connector pin, the method comprising the steps of: providing said connector pin; applying a layer of a barrier metal to said connector pin; applying a photo-resist material to said connector pin, then selectively exposing a portion of the photo-resist material so as to impart a pattern on the exposed portion; removing unexposed photo-resist material; applying a layer of precious metal to the connector pin such that said precious metal layer is applied to the exposed portion only.
2. The method according to claim 1, wherein the barrier metal includes nickel.
3. The method according to claim 1 or 2, wherein the precious metal is any one of: gold, platinum, silver and palladium.
4. The method according to claim 2, wherein the barrier metal includes tin, such that the applying step includes the steps of applying a layer of nickel and then applying a layer of tin.
5. The method according to any one of claims 1 to 4, wherein the pattern includes an arrangement of gold applied to the portion of the pin used for electrical connectivity.
6. The method according to any one of claims 1 to 4, wherein the pattern includes ) an arrangement so as to impart information to an observer.
7. The method according to claim 6, wherein the information includes any one or a combination of pin manufacturer, manufacturing date, material and/or physical properties of the gold plating.
8. A method for plating a leadframe, the method comprising the steps of: providing said leadframe; applying a dry film lamination to said leadframe; exposing said leadframe so as to impart an image to said dry film applying a metallic plating to said exposed image such that the thickness of said metallic plating is less than the thickness of the dry film lamination.
9. The method according to claim 8, further including the steps, after the metallic plating step, of placing target marks on said lead frame and then exposing the leadframe, such that the target marks ensure alignment of the leadframe during the exposing step.
10. The method according to claim 8 or 9, further including the steps of etching the dry film lamination from the leadframe and filtering etchant to remove dry film particles.
11. The method according to any one of claims 8 to 10, wherein the metallic plating is silver and further including the step, after the metallic plating step, of chamfering an edge of said plating.
SG2012013827A 2012-02-24 2012-02-24 A method for plating a component SG193052A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
SG2012013827A SG193052A1 (en) 2012-02-24 2012-02-24 A method for plating a component
PCT/SG2013/000073 WO2013126018A1 (en) 2012-02-24 2013-02-22 A method for plating a component
TW102106378A TW201341599A (en) 2012-02-24 2013-02-23 A method for plating a component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG2012013827A SG193052A1 (en) 2012-02-24 2012-02-24 A method for plating a component

Publications (1)

Publication Number Publication Date
SG193052A1 true SG193052A1 (en) 2013-09-30

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SG2012013827A SG193052A1 (en) 2012-02-24 2012-02-24 A method for plating a component

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SG (1) SG193052A1 (en)
TW (1) TW201341599A (en)
WO (1) WO2013126018A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG10201601865XA (en) * 2016-03-10 2017-10-30 Rokko Leadframes Pte Ltd Semiconductor device and method of manufacture

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04276096A (en) * 1991-03-04 1992-10-01 Canon Inc Method for forming character and pattern
US6706561B2 (en) * 2002-02-11 2004-03-16 Texas Instruments Incorporated Method for fabricating preplated nickel/palladium and tin leadframes
KR100690929B1 (en) * 2006-05-03 2007-03-09 한국기계연구원 Method for preparing a high resolution pattern with a high aspect ratio and the pattern thickness required by using a dry film resist

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TW201341599A (en) 2013-10-16
WO2013126018A1 (en) 2013-08-29

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