SG135118A1 - Low-latency baseline-wander compensation systems and methods - Google Patents

Low-latency baseline-wander compensation systems and methods

Info

Publication number
SG135118A1
SG135118A1 SG200701060-6A SG2007010606A SG135118A1 SG 135118 A1 SG135118 A1 SG 135118A1 SG 2007010606 A SG2007010606 A SG 2007010606A SG 135118 A1 SG135118 A1 SG 135118A1
Authority
SG
Singapore
Prior art keywords
methods
low
compensation systems
candidate data
data sequences
Prior art date
Application number
SG200701060-6A
Other languages
English (en)
Inventor
Yang Xueshi
Wu Zining
Original Assignee
Marvell World Trade Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marvell World Trade Ltd filed Critical Marvell World Trade Ltd
Publication of SG135118A1 publication Critical patent/SG135118A1/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10268—Improvement or modification of read or write signals bit detection or demodulation methods
    • G11B20/10287—Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors
    • G11B20/10296—Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors using the Viterbi algorithm
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10046—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
    • G11B20/10203—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter baseline correction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Error Detection And Correction (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)
SG200701060-6A 2006-02-21 2007-02-16 Low-latency baseline-wander compensation systems and methods SG135118A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US77516006P 2006-02-21 2006-02-21
US79038806P 2006-04-07 2006-04-07
US11/520,531 US7974366B2 (en) 2006-02-21 2006-09-12 Low-latency baseline-wander compensation systems and methods

Publications (1)

Publication Number Publication Date
SG135118A1 true SG135118A1 (en) 2007-09-28

Family

ID=38181145

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200701060-6A SG135118A1 (en) 2006-02-21 2007-02-16 Low-latency baseline-wander compensation systems and methods

Country Status (6)

Country Link
US (1) US7974366B2 (cg-RX-API-DMAC7.html)
EP (1) EP1833052B1 (cg-RX-API-DMAC7.html)
JP (1) JP5010938B2 (cg-RX-API-DMAC7.html)
CN (1) CN101047676B (cg-RX-API-DMAC7.html)
SG (1) SG135118A1 (cg-RX-API-DMAC7.html)
TW (1) TWI441488B (cg-RX-API-DMAC7.html)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102017409B (zh) * 2008-09-19 2014-02-19 艾格瑞系统有限公司 用于减少磁存储装置中的低频损耗的系统和方法
CN102480292A (zh) * 2010-11-25 2012-05-30 承景科技股份有限公司 基线漂移校正系统及方法
CN102386889B (zh) * 2011-09-29 2015-08-19 深圳Tcl新技术有限公司 基线漂移去除方法、装置及中值滤波器
US8902530B1 (en) * 2012-03-30 2014-12-02 Sk Hynix Memory Solutions Inc. Decision directed and non-decision directed low frequency noise cancelation in turbo detection
WO2015068106A1 (en) * 2013-11-08 2015-05-14 Koninklijke Philips N.V. Ecg high pass filter
CN104776869B (zh) * 2014-01-10 2019-01-22 深圳迈瑞生物医疗电子股份有限公司 一种光信号的解调方法、装置
CN108259067A (zh) * 2016-12-29 2018-07-06 深圳市中兴微电子技术有限公司 一种自适应判决反馈均衡的方法和装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2877109B2 (ja) * 1996-12-12 1999-03-31 日本電気株式会社 情報検出装置および情報検出方法
US6563892B1 (en) * 1999-06-15 2003-05-13 Telefonaktiebolaget Lm Ericsson Method and system for detection of binary information in the presence of slowly varying disturbances
US6449320B1 (en) * 1999-07-02 2002-09-10 Telefonaktiebolaget Lm Ericsson (Publ) Equalization with DC-offset compensation
JP3647761B2 (ja) * 2001-03-07 2005-05-18 富士通株式会社 データ再生方法及びデータ再生装置並びに光磁気ディスク装置
CN100483531C (zh) * 2001-12-07 2009-04-29 希捷科技有限公司 预处理垂直记录中低频的方法和装置
US7167327B2 (en) 2003-01-06 2007-01-23 Agere Systems Inc. Integrated circuit and method for remodulating bits and hard disk drive incorporating the same
US7165211B2 (en) * 2004-09-20 2007-01-16 Guzik Technical Enterprises Viterbi decoder with direct current restoration
KR20060031077A (ko) * 2004-10-07 2006-04-12 삼성전자주식회사 연선을 이용하는 이더넷 수신기의 디지털 신호 처리 장치

Also Published As

Publication number Publication date
JP5010938B2 (ja) 2012-08-29
CN101047676B (zh) 2015-02-11
TWI441488B (zh) 2014-06-11
JP2007299509A (ja) 2007-11-15
US20070195912A1 (en) 2007-08-23
TW200742361A (en) 2007-11-01
CN101047676A (zh) 2007-10-03
EP1833052A1 (en) 2007-09-12
EP1833052B1 (en) 2013-04-10
US7974366B2 (en) 2011-07-05

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