SG115742A1 - Sram device having high aspect ratio cell boundary - Google Patents

Sram device having high aspect ratio cell boundary

Info

Publication number
SG115742A1
SG115742A1 SG200501383A SG200501383A SG115742A1 SG 115742 A1 SG115742 A1 SG 115742A1 SG 200501383 A SG200501383 A SG 200501383A SG 200501383 A SG200501383 A SG 200501383A SG 115742 A1 SG115742 A1 SG 115742A1
Authority
SG
Singapore
Prior art keywords
aspect ratio
high aspect
cell boundary
sram device
ratio cell
Prior art date
Application number
SG200501383A
Other languages
English (en)
Inventor
Jhon Jhy Liaw
Original Assignee
Taiwan Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/818,133 external-priority patent/US7233032B2/en
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Publication of SG115742A1 publication Critical patent/SG115742A1/en

Links

SG200501383A 2004-04-05 2005-02-24 Sram device having high aspect ratio cell boundary SG115742A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/818,133 US7233032B2 (en) 2003-12-05 2004-04-05 SRAM device having high aspect ratio cell boundary

Publications (1)

Publication Number Publication Date
SG115742A1 true SG115742A1 (en) 2005-10-28

Family

ID=35067623

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200501383A SG115742A1 (en) 2004-04-05 2005-02-24 Sram device having high aspect ratio cell boundary

Country Status (4)

Country Link
JP (1) JP2005294849A (zh)
CN (1) CN100358146C (zh)
SG (1) SG115742A1 (zh)
TW (1) TWI270176B (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8390033B2 (en) * 2009-02-23 2013-03-05 Taiwan Semiconductor Manufacturing Company, Ltd. Metal structure for memory device
US8189368B2 (en) * 2009-07-31 2012-05-29 Taiwan Semiconductor Manufacturing Co., Ltd. Cell structure for dual port SRAM
US9251888B1 (en) 2014-09-15 2016-02-02 Taiwan Semiconductor Manufacturing Company, Ltd. SRAM cells with vertical gate-all-round MOSFETs
US9524972B2 (en) * 2015-02-12 2016-12-20 Qualcomm Incorporated Metal layers for a three-port bit cell
CN109994475B (zh) * 2018-01-03 2022-07-05 蓝枪半导体有限责任公司 半导体元件与半导体装置
CN111128995B (zh) * 2018-10-31 2022-06-21 联华电子股份有限公司 静态随机存取存储器单元结构
CN116631939B (zh) * 2023-07-14 2023-12-12 长鑫存储技术有限公司 半导体结构的制备方法以及半导体结构

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0578915A3 (en) * 1992-07-16 1994-05-18 Hewlett Packard Co Two-port ram cell
CN1068459C (zh) * 1996-10-14 2001-07-11 联华电子股份有限公司 静态随机存取存储器及其制作方法
US5896313A (en) * 1997-06-02 1999-04-20 Micron Technology, Inc. Vertical bipolar SRAM cell, array and system, and a method of making the cell and the array
US6417032B1 (en) * 2000-04-11 2002-07-09 Taiwan Semiconductor Manufacturing Company Method of forming cross strapped Vss layout for full CMOS SRAM cell

Also Published As

Publication number Publication date
TW200616147A (en) 2006-05-16
TWI270176B (en) 2007-01-01
CN100358146C (zh) 2007-12-26
JP2005294849A (ja) 2005-10-20
CN1681126A (zh) 2005-10-12

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