SG115388A1 - Memory controller with programmable address configuration - Google Patents

Memory controller with programmable address configuration

Info

Publication number
SG115388A1
SG115388A1 SG200104086A SG200104086A SG115388A1 SG 115388 A1 SG115388 A1 SG 115388A1 SG 200104086 A SG200104086 A SG 200104086A SG 200104086 A SG200104086 A SG 200104086A SG 115388 A1 SG115388 A1 SG 115388A1
Authority
SG
Singapore
Prior art keywords
memory controller
address configuration
programmable address
programmable
configuration
Prior art date
Application number
SG200104086A
Other languages
English (en)
Inventor
L Manter Venitha
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Publication of SG115388A1 publication Critical patent/SG115388A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1694—Configuration of memory controller to different memory types

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
SG200104086A 2000-07-14 2001-07-13 Memory controller with programmable address configuration SG115388A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/616,286 US6684314B1 (en) 2000-07-14 2000-07-14 Memory controller with programmable address configuration

Publications (1)

Publication Number Publication Date
SG115388A1 true SG115388A1 (en) 2005-10-28

Family

ID=24468791

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200104086A SG115388A1 (en) 2000-07-14 2001-07-13 Memory controller with programmable address configuration

Country Status (3)

Country Link
US (1) US6684314B1 (https=)
JP (1) JP2002055875A (https=)
SG (1) SG115388A1 (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7418574B2 (en) 2002-10-31 2008-08-26 Lockheed Martin Corporation Configuring a portion of a pipeline accelerator to generate pipeline date without a program instruction
US6882590B2 (en) * 2003-01-29 2005-04-19 Micron Technology, Inc. Multiple configuration multiple chip memory device and method
US7151709B2 (en) * 2004-08-16 2006-12-19 Micron Technology, Inc. Memory device and method having programmable address configurations
WO2006039710A2 (en) * 2004-10-01 2006-04-13 Lockheed Martin Corporation Computer-based tool and method for designing an electronic circuit and related system and library for same
US7139673B1 (en) * 2004-11-05 2006-11-21 Xilinx, Inc. Method of and circuit for verifying a data transfer protocol
US9582449B2 (en) 2005-04-21 2017-02-28 Violin Memory, Inc. Interconnection system
CN103116565A (zh) * 2005-04-21 2013-05-22 提琴存储器公司 可配置的开关原件、互连网络及布局网络间相互连接方法
US9384818B2 (en) 2005-04-21 2016-07-05 Violin Memory Memory power management
US7609562B2 (en) * 2007-01-31 2009-10-27 Intel Corporation Configurable device ID in non-volatile memory
CN101859330B (zh) * 2009-04-09 2012-11-21 辉达公司 验证集成电路效能模型的方法
US20130194881A1 (en) * 2010-11-09 2013-08-01 Steven C. Woo Area-efficient multi-modal signaling interface
JP5524144B2 (ja) 2011-08-08 2014-06-18 株式会社東芝 ｋｅｙ−ｖａｌｕｅストア方式を有するメモリシステム

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5621678A (en) * 1995-04-13 1997-04-15 Digital Equipment Corporation Programmable memory controller for power and noise reduction
US5918242A (en) * 1994-03-14 1999-06-29 International Business Machines Corporation General-purpose customizable memory controller

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4282584A (en) * 1979-05-30 1981-08-04 Allen-Bradley Company Mini-programmable controller
US5522064A (en) * 1990-10-01 1996-05-28 International Business Machines Corporation Data processing apparatus for dynamically setting timings in a dynamic memory system
AU2476192A (en) * 1991-08-16 1993-03-16 Multichip Technology High-performance dynamic memory system
US6044474A (en) * 1997-04-08 2000-03-28 Klein; Dean A. Memory controller with buffered CAS/RAS external synchronization capability for reducing the effects of clock-to-signal skew
US5867444A (en) * 1997-09-25 1999-02-02 Compaq Computer Corporation Programmable memory device that supports multiple operational modes
US6366989B1 (en) * 1998-09-17 2002-04-02 Sun Microsystems, Inc. Programmable memory controller
US6438670B1 (en) * 1998-10-02 2002-08-20 International Business Machines Corporation Memory controller with programmable delay counter for tuning performance based on timing parameter of controlled memory storage device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5918242A (en) * 1994-03-14 1999-06-29 International Business Machines Corporation General-purpose customizable memory controller
US5621678A (en) * 1995-04-13 1997-04-15 Digital Equipment Corporation Programmable memory controller for power and noise reduction

Also Published As

Publication number Publication date
US6684314B1 (en) 2004-01-27
JP2002055875A (ja) 2002-02-20

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