SG11202001191VA - Conformal halogen doping in 3d structures using conformal dopant film deposition - Google Patents

Conformal halogen doping in 3d structures using conformal dopant film deposition

Info

Publication number
SG11202001191VA
SG11202001191VA SG11202001191VA SG11202001191VA SG11202001191VA SG 11202001191V A SG11202001191V A SG 11202001191VA SG 11202001191V A SG11202001191V A SG 11202001191VA SG 11202001191V A SG11202001191V A SG 11202001191VA SG 11202001191V A SG11202001191V A SG 11202001191VA
Authority
SG
Singapore
Prior art keywords
conformal
structures
film deposition
dopant film
halogen doping
Prior art date
Application number
SG11202001191VA
Inventor
Rui Cheng
Yi Yang
Karthik Janakiraman
Abhijit Basu Mallick
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of SG11202001191VA publication Critical patent/SG11202001191VA/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/785Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
SG11202001191VA 2017-09-03 2018-08-28 Conformal halogen doping in 3d structures using conformal dopant film deposition SG11202001191VA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201762553902P 2017-09-03 2017-09-03
PCT/US2018/048341 WO2019046301A1 (en) 2017-09-03 2018-08-28 Conformal halogen doping in 3d structures using conformal dopant film deposition

Publications (1)

Publication Number Publication Date
SG11202001191VA true SG11202001191VA (en) 2020-03-30

Family

ID=65526078

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202001191VA SG11202001191VA (en) 2017-09-03 2018-08-28 Conformal halogen doping in 3d structures using conformal dopant film deposition

Country Status (6)

Country Link
US (1) US11462630B2 (en)
JP (1) JP7288432B2 (en)
KR (1) KR102343837B1 (en)
CN (1) CN111095481B (en)
SG (1) SG11202001191VA (en)
WO (1) WO2019046301A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112005380A (en) 2018-04-06 2020-11-27 应用材料公司 Method for conformal doping of three-dimensional structures
US20240087882A1 (en) * 2022-09-09 2024-03-14 Applied Materials, Inc. Fluorine-doped silicon-containing materials

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JPH03163821A (en) 1989-11-21 1991-07-15 Nec Corp Manufacture of semiconductor device
US6191463B1 (en) * 1997-07-15 2001-02-20 Kabushiki Kaisha Toshiba Apparatus and method of improving an insulating film on a semiconductor device
KR20020027775A (en) 2000-10-05 2002-04-15 장 진 Metal induced crystallization method of P-doped amorphous silicon
US7651955B2 (en) * 2005-06-21 2010-01-26 Applied Materials, Inc. Method for forming silicon-containing materials during a photoexcitation deposition process
US20080023732A1 (en) * 2006-07-28 2008-01-31 Felch Susan B Use of carbon co-implantation with millisecond anneal to produce ultra-shallow junctions
US7807556B2 (en) 2006-12-05 2010-10-05 General Electric Company Method for doping impurities
WO2008104059A1 (en) 2007-02-27 2008-09-04 Sixtron Advanced Materials, Inc. Method for forming a film on a substrate
US8114761B2 (en) 2009-11-30 2012-02-14 Applied Materials, Inc. Method for doping non-planar transistors
US20110256734A1 (en) * 2010-04-15 2011-10-20 Hausmann Dennis M Silicon nitride films and methods
US8956983B2 (en) * 2010-04-15 2015-02-17 Novellus Systems, Inc. Conformal doping via plasma activated atomic layer deposition and conformal film deposition
US8501605B2 (en) * 2011-03-14 2013-08-06 Applied Materials, Inc. Methods and apparatus for conformal doping
KR20120110193A (en) * 2011-03-29 2012-10-10 삼성전자주식회사 Method of implanting impurities and method of manufacturing a cmos image sensor using the same
US8580664B2 (en) 2011-03-31 2013-11-12 Tokyo Electron Limited Method for forming ultra-shallow boron doping regions by solid phase diffusion
US8841763B2 (en) 2011-04-29 2014-09-23 Tessera, Inc. Three-dimensional system-in-a-package
US8900973B2 (en) 2011-08-30 2014-12-02 International Business Machines Corporation Method to enable compressively strained pFET channel in a FinFET structure by implant and thermal diffusion
WO2013161768A1 (en) * 2012-04-23 2013-10-31 東京エレクトロン株式会社 Film forming method, film forming device, and film forming system
US9218973B2 (en) 2012-06-15 2015-12-22 Applied Materials, Inc. Methods of doping substrates with ALD
US8921181B2 (en) 2012-12-27 2014-12-30 Intermolecular, Inc. Flourine-stabilized interface
US9490125B2 (en) 2013-01-30 2016-11-08 Applied Materials, Inc. Methods for forming a molecular dopant monolayer on a substrate
US9184233B2 (en) * 2013-02-27 2015-11-10 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for defect passivation to reduce junction leakage for finFET device
US9029226B2 (en) * 2013-03-13 2015-05-12 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for doping lightly-doped-drain (LDD) regions of finFET devices
CN104576369A (en) * 2013-10-10 2015-04-29 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor apparatus
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US20150132938A1 (en) * 2013-11-13 2015-05-14 Intermolecular, Inc. Methods and Systems for Forming Reliable Gate Stack on Semiconductors
US9704708B2 (en) * 2014-07-11 2017-07-11 Applied Materials, Inc. Halogenated dopant precursors for epitaxy
KR20160044976A (en) * 2014-10-16 2016-04-26 삼성전자주식회사 Semiconductor device including fin-type field effect transistor
KR20170070281A (en) * 2014-10-30 2017-06-21 어플라이드 머티어리얼스, 인코포레이티드 Method to grow thin epitaxial films at low temperature
US9640400B1 (en) 2015-10-15 2017-05-02 Applied Materials, Inc. Conformal doping in 3D si structure using conformal dopant deposition
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CN112005380A (en) * 2018-04-06 2020-11-27 应用材料公司 Method for conformal doping of three-dimensional structures

Also Published As

Publication number Publication date
US11462630B2 (en) 2022-10-04
JP2020532871A (en) 2020-11-12
WO2019046301A1 (en) 2019-03-07
US20200194571A1 (en) 2020-06-18
KR102343837B1 (en) 2021-12-24
CN111095481B (en) 2024-01-02
KR20200036955A (en) 2020-04-07
CN111095481A (en) 2020-05-01
JP7288432B2 (en) 2023-06-07

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